Tri path Technol og y, I nc. - Techni cal I nformation
APPLICATION / TEST CIRCUIT
T AA2008
OA OUT1
29
R
F
20K
Ω
INV 1
R
I
20K
Ω
C
A
0.1uF
(Pin 4)
5V
V DD1
V DD1
L
o
10uH, 2A
C
I
2.2uF
+
30
15
OUTP1
D
O
**
BIA SCA P
3
Proces s ing
&
Modulation
PGND1
V DD1
(Pin 18)
(Pin 18)
V DD1
L
o
10uH, 2A
C
o
0.22uF
C
Z
0.22uF
C
DO
0.01uF
R
L
8
Ω
or 16
Ω
13
OUTM1
C
o
0.22uF
R
Z
10
Ω ,
1/4W
D
O
**
PGND1
(Pin 18)
FA ULT (c onnec t to MUTE f or auto res tart)
OV ERLOA DB
V DD2
5V
MUTE
31
6
26
C
I
2.2uF
+
R
F
20K
Ω
OA OUT2
1
V DD2
L
o
10uH, 2A
INV 2
R
I
20K
Ω
2
10
OUTP2
D
O
**
25
(Pin 24)
R
RE F
8.25K
Ω
, 1%
REF
Proces s ing
&
Modulation
PGND2
V DD2
(Pin 7)
(Pin 7)
V DD2
L
o
10uH, 2A
C
o
0.22uF
C
Z
0.22uF
C
DO
0.01uF
22
+12V
1M
Ω
C
D
0.1uF
DCA P1
12
OUTM2
C
o
R
Z
0.22uF 10
Ω ,
1/4W
R
L
8
Ω
or 16
Ω
D
O
**
21
5
DCA P2
PGND2
SLEEP
CPUMP
19
(Pin 7)
N.C.
0.1uF
23
C
S
0.1uF
To Pin 20
C
S
0.1uF
+
V 5D
A GND1
V5A
A GND2
A GND3
5V
V DDA
DGND
5V GEN
17
8
20
C
P
1uF
C
S
0.1uF
C
S
0.1uF
To Pins 23,28
24
28
27
4
V DD1
PGND1
14
18
C
SW
0.1uF
+
V DD (+12V )
C
S W
**
100uF, 16V
9
16
NC
32
NC
NC
V DD2
PGND2
11
7
C
SW
0.1uF
Note: A nalog and Digital/Pow er Grounds mus t
be c onnec ted loc ally at the TA A 2008
A nalog Ground
Digital/Pow er Ground
** For V DD v oltages abov e 13.2V , output diodes (D
O
) s hould be us ed
and the v alue of C
S W
s hould be inc reas ed to 220uF. A ll Diodes are
Motorola MBRS130T3 or equiv alent.
5
TAA2008 –KLi/1.0/05.06
TRIPATH [ TRIPATH TECHNOLOGY INC. ]
