TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
202 / 204
96 Register 0x0932:0x0933 (Speed Cnt Diff) 96
97 Register 0x0934 (Sys Time Diff Filter) . 97
98 Register 0x0935 (Speed Cnt Filter Depth) 97
99 Register 0x0980 (Cyclic Unit Cntrl) . . 98
100 Register 0x0981 (SYNC Out Activation) 99
101 Register 0x0982:0x0983 (SYNC Pulse
Length) . . . . . . . . . . . . . . . . . . 100
102 Register 0x0984 (Activation Status) . . 100
103 Register 0x098E (SYNC0 Status) . . . . 100
104 Register 0x098F (SYNC1 Status) . . . . 101
105 Register 0x0990:0x0997 (Start Time
Cyclic Operation) . . . . . . . . . . . . 101
106 Register 0x0998:0x099F (Next SYNC1) 101
107 Register 0x09A0:0x09A3 (SYNC0 Cycle
Time) . . . . . . . . . . . . . . . . . . . 102
108 Register 0x09A4:0x09A7 (SYNC1 Cycle
Time) . . . . . . . . . . . . . . . . . . . 102
109 Register 0x09A8 (Latch0 Control) . . . 103
110 Register 0x09A9 (Latch1 Control) . . . 103
111 Register 0x09AE (Latch0 Status) . . . . 104
112 Register 0x09AF (Latch1 Status) . . . . 104
113 Register 0x09B0:0x09B7 (Latch0 Time
Pos Edge) . . . . . . . . . . . . . . . . . 105
114 Register 0x09B8:0x09BF (Latch0 Time
Neg Edge) . . . . . . . . . . . . . . . . 105
115 Register 0x09C0:0x09C7 (Latch1 Time
Pos Edge) . . . . . . . . . . . . . . . . . 106
116 Register 0x09C8:0x09CF (Latch1 Time
Neg Edge) . . . . . . . . . . . . . . . . 106
117 Register 0x09F0:0x09F3 (ECAT Buffer
Change Event Time) . . . . . . . . . . . 107
118 Register 0x09F8:0x09FB (PDI Buffer
Start Event Time) . . . . . . . . . . . . 107
119 Register 0x09FC:0x09FF (PDI Buffer
Change Event Time) . . . . . . . . . . . 107
120 Register 0x0E00:0x0E07 (Product ID) . 108
121 Register 0x0E08:0x0E0F (Vendor ID) . 108
122 Process Data RAM (0x1000:0xFFFF) . . 109
123 Process Data RAM Size . . . . . . . . . 109
124 MFC IO Register Overview for
TMC8462-BA . . . . . . . . . . . . . . . 114
125 MFC IO Register 0 – ENC_MODE . . . 115
126 MFC IO Register 1 – ENC_STATUS . . . 116
127 MFC IO Register 2 – X_ENC (write) . . 116
128 MFC IO Register 3 – X_ENC (read) . . . 116
129 MFC IO Register 4 – ENC_CONST . . . 116
130 MFC IO Register 5 – ENC_LATCH . . . 117
131 MFC IO Register 6 – SPI_RX_DATA . . . 118
132 MFC IO Register 7 – SPI_TX_DATA . . . 118
133 MFC IO Register 8 – SPI_CONF . . . . . 119
134 MFC IO Register 9 – SPI_STATUS . . . . 119
135 MFC IO Register 10 – SPI_LENGTH . . 119
136 MFC IO Register 11 – SPI_TIME . . . . 119
137 MFC IO Register 12 – I2C_TIMEBASE . 120
138 MFC IO Register 13 – I2C_CONTROL . 120
139 MFC IO Register 14 – I2C_STATUS . . . 120
140 MFC IO Register 15 – I2C_ADDRESS . . 121
141 MFC IO Register 16 – I2C_DATA_R . . . 121
142 MFC IO Register 17 – I2C_DATA_W . . 121
143 MFC IO Register 18 – SD_CH0_STEPRATE122
144 MFC IO Register 19 – SD_CH1_STEPRATE122
145 MFC IO Register 20 – SD_CH2_STEPRATE122
146 MFC IO Register 21 – SD_CH0_STEPCOUNT123
147 MFC IO Register 22 – SD_CH1_STEPCOUNT123
148 MFC IO Register 23 – SD_CH2_STEPCOUNT123
149 MFC IO Register 24 – SD_CH0_STEPTARGET123
150 MFC IO Register 25 – SD_CH1_STEPTARGET124
151 MFC IO Register 26 – SD_CH2_STEPTARGET124
152 MFC IO Register 27 – SD_CH0_COMPARE124
153 MFC IO Register 28 – SD_CH1_COMPARE125
154 MFC IO Register 29 – SD_CH2_COMPARE125
155 MFC IO Register 30 – SD_CH0_NEXTSR 125
156 MFC IO Register 31 – SD_CH1_NEXTSR 125
157 MFC IO Register 32 – SD_CH2_NEXTSR 126
158 MFC IO Register 33 – SD_STEPLENGTH 126
159 MFC IO Register 34 – SD_DELAY . . . . 126
160 MFC IO Register 35 – SD_CFG . . . . . 127
161 MFC IO Register 36 – PWM_CFG . . . . 128
162 MFC IO Register 37 – PWM1 . . . . . . 129
163 MFC IO Register 38 – PWM2 . . . . . . 129
164 MFC IO Register 39 – PWM3 . . . . . . 129
165 MFC IO Register 40 – PWM4 . . . . . . 129
166 MFC IO Register 41 – PWM1_CNTRSHFT 130
167 MFC IO Register 42 – PWM2_CNTRSHFT 130
168 MFC IO Register 43 – PWM3_CNTRSHFT 130
169 MFC IO Register 44 – PWM4_CNTRSHFT 130
170 MFC IO Register 45 – PWM_PULSE_B_PULSE_A131
171 MFC IO Register 46 – PWM_PULSE_LENGTH131
172 MFC IO Register 47 – GPO . . . . . . . 132
173 MFC IO Register 48 – GPI . . . . . . . . 132
174 MFC IO Register 49 – GPIO_CONFIG . 132
175 MFC IO Register 50 – DAC_VAL . . . . 133
176 MFC IO Register 51 – MFCIO_IRQ_CFG 134
177 MFC IO Register 52 – MFCIO_IRQ_FLAGS135
178 MFC IO Register 53 – WD_TIME . . . . 136
179 MFC IO Register 54 – WD_CFG . . . . . 136
180 MFC IO Register 55 – WD_OUT_MASK_POL137
181 MFC IO Register 56 – WD_OE_POL . . 137
182 MFC IO Register 57 – WD_IN_MASK_POL138
183 MFC IO Register 58 – WD_MAX . . . . 138
184 MFC IO Register 59 – HV_ANA_STATUS 139
185 MFC IO Register 63 – SYNC1_SYNC0_EVENT_CNT139
186 MFC IO Register 64 – HVIO_CFG . . . . 140
187 MFC IO Register 65 – BUCK_CONV_CFG 142
188 MFC IO Register 66 – AL_OVERRIDE
. 143
189 EEPROM Parameter Map . . . . . . . . 147
190 Crossbar configuration values . . . . 150
191 Slope Slow/Weak High/WeakLow config152
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