TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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7.3.10 High Voltage Status and General Control
7.3.10.1 Register 59 – HV_ANA_STATUS
Bit
Description
ECAT
PDI
Range [Unit]
7:0
HVIO_OUTPUT_HV_DETECT,
bit[i] = 1 = high voltage detected at HV output [i]
r/-
r/-
15:8
HV_SHORT2GND_DETECT,
r/-
r/-
r/-
r/-
bit[i] = 1 = short to ground detected at HV IO [i-8]
23:16 HV_SHORT2VS_DETECT,
bit[i] = 1 = high voltage detected at HV IO [i-16]
24
25
26
27
HV_OT_FLAG
r/-
r/-
r/-
r/-
r/-
r/-
r/-
r/-
r/-
r/-
B3V3_SC_FLAG
BVOUT_SC_FLAG
BVOUT_OT_FLAG
31:28 unused/reserved
Table 184: MFC IO Register 59 – HV_ANA_STATUS
7.3.10.2 Register 63 – SYNC1_SYNC0_EVENT_CNT
Bit
Description
ECAT
r/-
PDI
r/-
Range [Unit]
15:0
SYNC_OUT0 event counter value
0 . . . + (216) − 1
0 . . . + (216) − 1
31:16 SYNC_OUT1 event counter value
r/-
r/-
Table 185: MFC IO Register 63 – SYNC1_SYNC0_EVENT_CNT
Note
Note
Reading does not clear counters. Counters are running all the time and wrap
when maximum count is reached.
Register 63 can only be read when mapped to the ECAT Process Data RAM. It
cannot be read from the MCF CTRL SPI interface.
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