TMC5031 DATASHEET (Rev. 1.11 / 2016-APR-28)
26
5.3 Motor Driver Registers
MOTOR DRIVER REGISTER SET (MOTOR 1: 0X60…0X6F, MOTOR 2: 0X70…0X7F)
R/W
Addr
n
Register
Description / bit names
Range [Unit]
MSLUT1[0]
MSLUT2[0]
Each bit gives the difference between 32x 0 or 1
microstep x and x+1 when combined with reset default=
0x60
0x70
the corresponding MSLUTSEL W bits:
sine wave
W
32
microstep
table entries
0…31
0: W= %00: -1
table
%01: +0
%10: +1
%11: +2
7x
1: W= %00: +0
32x 0 or 1
reset default=
sine wave
table
%01: +1
%10: +2
%11: +3
0x61
…
0x67
0x71
…
MSLUT1[1...7]
MSLUT2[1...7]
7
x
32
This is the differential coding for the first
quarter of a wave. Start values for CUR_A and
W
microstep
table entries CUR_B are stored for MSCNT position 0 in
0x77
32…255
START_SIN and START_SIN90_120.
ofs31, ofs30, …, ofs01, ofs00
…
ofs255, ofs254, …, ofs225, ofs224
This register defines four segments within 0<X1<X2<X3
each quarter MSLUT wave. Four 2 bit entries reset default=
determine the meaning of a 0 and a 1 bit in sine wave
0x68
0x78
MSLUTSEL1
MSLUTSEL2
W
W
32
the corresponding segment of MSLUT.
table
See separate table!
bit 7… 0:
START_SIN
START_SIN
bit 23… 16: START_SIN90_120
reset default
START_SIN gives the absolute current at =0
microstep table entry 0.
START_SIN90_120 gives the absolute current START_SIN90_1
8
+
8
0x69
0x79
MSLUTSTART for microstep table entry at positions 256.
20
reset default
Start values are transferred to the microstep =247
registers CUR_A and CUR_B, whenever the
reference position MSCNT=0 is passed.
Microstep counter. Indicates actual position
in the microstep table for CUR_A. CUR_B uses
an offset of 256.
Hint: Move to a position where MSCNT is
zero before re-initializing MSLUTSTART or
MSLUT and MSLUTSEL.
0x6A
0x7A
R
R
10 MSCNT
bit 8… 0:
CUR_A (signed):
Actual microstep current for
motor phase A as read from
MSLUT (not scaled by current)
9
+
0x6B
0x7B
MSCURACT
bit 24… 16: CUR_B (signed):
9
Actual microstep current for
motor phase B as read from
MSLUT (not scaled by current)
0x6C
0x7C
chopper and driver configuration
See separate table!
coolStep smart current control register
and stallGuard2 configuration
See separate table!
RW
W
32 CHOPCONF
25 COOLCONF
0x6D
0x7D
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