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TMC2041-EVAL-KIT 参数 Datasheet PDF下载

TMC2041-EVAL-KIT图片预览
型号: TMC2041-EVAL-KIT
PDF下载: 下载PDF文件 查看货源
内容描述: [EVAL KIT FOR TMC2041]
分类和应用:
文件页数/大小: 65 页 / 2202 K
品牌: TRINAMIC [ TRINAMIC MOTION CONTROL GMBH & CO. KG. ]
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TMC2041 DATASHEET (Rev. 1.02 / 2017-MAY-16)  
25  
GENERAL CONFIGURATION REGISTERS (0X00…0X0F)  
R/W  
Addr  
n
Register  
Description / bit names  
Bit GSTAT Global status flags  
0
reset  
1:  
Indicates that the IC has been reset since the last  
read access to GSTAT. All registers have been  
cleared to reset values.  
1
drv_err1  
1: Indicates, that driver 1 has been shut down due  
to overtemperature or short circuit detection  
since the last read access. Read DRV_STATUS1 for  
details. The flag can only be reset when all error  
conditions are cleared.  
R+C  
0x01  
4
GSTAT  
2
3
drv_err2  
1:  
Indicates, that driver 2 has been shut down due  
to overtemperature or short circuit detection  
since the last read access. Read DRV_STATUS2 for  
details. The flag can only be reset when all error  
conditions are cleared.  
uv_cp  
1:  
Indicates an undervoltage on the charge pump.  
The driver is disabled in this case.  
Interface transmission counter. This register becomes  
incremented with each successful UART interface write access.  
It can be read out to check the serial transmission for lost  
data. Read accesses do not change the content. Disabled in SPI  
operation. The counter wraps around from 255 to 0.  
R
0x02  
8
IFCNT  
Bit  
7..0 SLAVEADDR:  
Sets the address of unit for the UART interface. The  
SLAVECONF  
address becomes incremented by one when the  
external address pin NEXTADDR is active.  
Range: 0-253 (254), default=0  
In ring mode, 0 disables forwarding.  
11..8 SENDDELAY:  
8
+
4
W
0x03  
SLAVECONF  
0, 1: 8 bit times (not allowed with multiple slaves)  
2, 3: 3*8 bit times  
4, 5: 5*8 bit times  
6, 7: 7*8 bit times  
8, 9: 9*8 bit times  
10, 11: 11*8 bit times  
12, 13: 13*8 bit times  
14, 15: 15*8 bit times  
INPUT  
Bit  
Reads the digital state of all input pins available plus  
the state of IO pins set to output.  
io0_in: IO0 polarity  
io1_in: IO1 polarity  
io2_in: IO2 polarity  
0
1
2
3
4
5
6
7
9
+
R
0x04  
INPUT  
io3_in: IO3 polarity  
8
iop_in: IOP pin polarity (always input in SPI mode)  
ion_in: ION pin polarity (always input in SPI mode)  
nextaddr_in: NEXTADDR pin polarity  
drv_enn_in: DRV_ENN pin polarity  
8
sw_comp_in: UART input comparator (1: IOP voltage is  
above ION voltage). The accuracy is about 20mV.  
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