XC61C
Series
■MARKING RULE (Continued)
●TO-92
①Represents output configuration
OUTPUT
CONFIGURATION
MARK
C
N
CMOS
N-ch
②, ③Represents detect voltage (ex.)
MARK
VOLTAGE (V)
②
3
5
③
3
0
3.3
5.0
④Represents delay time
MARK
0
DELAY TIME
No delay
⑤Represents detect voltage accuracy
MARK
DETECT VOLTAGE ACCURACY
1
2
Within ± 1% (Semi-custom)
Within ± 2%
⑥Represents a least significant digit of production year
MARK
PRODUCTION YEAR
5
6
2005
2006
⑦Represents production lot number
0 to 9, A to Z repeated. (G, I, J, O, Q, W excepted)
* No character inversion used.
●USP-6B, USP-6C
①, ②Represents product series
MARK
PRODUCT SERIES
①
②
1
C
XC61Cxxx0xDx
③Represents output configuration
MARK
C
N
OUTPUT CONFIGURATION
PRODUCT SERIES
XC61CCxx0xDx
XC61CNxx0xDx
USP-6B
(TOP VIEW)
CMOS
N-ch
④, ⑤Represents detect voltage
(ex.)
MARK
VOLTAGE (V)
PRODUCT SERIES
④
3
⑤
3
0
3.3
5.0
XC61Cx330xDx
XC61Cx500xDx
5
USP-6C
(TOP VIEW)
⑥Represents production lot number
0 to 9, A to Z repeated (G, I, J, O, Q, W excepted)
Note: No character inversion used.
7/19
TOREX [ Torex Semiconductor ]
