TE
tmCH
T436416A
DC CHARACTERISTICS
TA = 0 to 70 C , VIH(min)/VIL(max)=2.0V/0.8V
°
Speed version
Parameter
Symbol
Unit
Test Condition
Note
-6 -7 -7.5 -8 -10
Operating Current
( One Bank Active)
Precharge Standby
Current in power-
down mode
Precharge Standby
Current in non
power-down mode
Burst Length = 1
ICC1
140 120 115 110 100 mA
1,3
tRC≥ RC(min) , CC≥ CC(min),IOL= 0 mA
t
t
t
t
CKE VIL(max), CC=15ns
≤
ICC2
P
2
mA
3
3
3
3
t
∞
CKE VIL(max),CLK VIL(max), CC =
≤
≤
ICC2PS
2
t
≥ VIH(min), CC=15ns
CKE ≥ VIH(min),
CS
ICC2
N
30
mA
2
Input signals are changed one time during 30ns
t
∞
CKE≥VIH(min),CLK VIL(min), CC=
≤
ICC2NS
Input signals are stable
t
CKE VIL(max), CC=15ns
Active Standby
Current in power-
down mode
Active Standby
Current in non
power-down mode
≤
ICC3
P
10
mA
t
∞
CKE VIL(max),CLK VIL(max), CC=
≤
≤
ICC3PS
10
t
≥VIH(min), CC=15ns
CKE≥VIH(min),
CS
ICC3
N
40
Input signals are changed one time during 30ns
mA
t
∞
CKE≥VIH(min),CLK VIL(min), CC=
≤
ICC3NS
10
(One Bank Active)
Input signals are stable
Operating Current
(Burst Mode)
CAS Latency 3
IOL=0 mA,Page Burst
All Band Activated
150 130 125 120 110
mA
ICC4
1,3
2,3
CAS Latency 2
150 130 125 120 110
tCCD= CCD(min)
t
Refresh Current
tRC ≥tRC(min)
ICC5
ICC6
150 130 125 120 110 mA
CKE 0.2V
Self refresh
Current
≤
1
mA
t
Note: 1. Measured with output open. Addresses are changed only one time during CC(min) .
t
2. Refresh period is 64ms. Addresses are changed only one time during CC(min) .
t
3. CC : Clock cycle time.
t
t
RC : Row cycle time.
CCD : Column address to column address delay time.
TM Technology Inc. reserves the right
to change products or specifications without notice.
P. 5
Publication Date: MAY. 2003
Revision: B
TMT [ TAIWAN MEMORY TECHNOLOGY ]
