TE
tmCH
T436416A
MODE REGISTER
11
0
10
0
9
8
7
6
5
5
4
4
3
2
1
0
0
0
JEDEC Standard Test Set (refresh counter test)
0
0
1
11
x
10
x
9
8
7
7
7
6
3
2
1
Burst Read and Single Write (for Write Through Cache)
1
0
0
0
LTMODE
WT
BL
11
10
9
8
1
6
5
4
3
2
2
1
Use in future
11
x
10
x
9
x
8
1
6
v
5
v
4
v
3
v
2
v
1
v
0
v
1
Vender Specific
11
0
10
0
9
0
8
0
7
0
6
5
4
3
WT
1
BL
0
v = Valid
x = Don’t care
LTMODE
Mode Register Set
Bit2-0
000
WT=0
1
WT=1
1
001
010
011
100
2
4
2
4
8
8
Burst length
R
R
101
110
111
R
R
R
R
R
Full page
0
1
Sequential
Wrap type
Interleave
Bit6-4
000
CAS Latency
R
001
010
011
100
R
2
3
Latency mode
R
101
110
111
R
R
R
Remark R : Reserved
Mode Register Write Timing
CLOCK
CKE
CS
RAS
CAS
WE
A0-A11
TM Technology Inc. reserves the right
to change products or specifications without notice.
P.10
Publication Date: MAY. 2003
Revision: B
TMT [ TAIWAN MEMORY TECHNOLOGY ]
