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SLUS157L − DECEMBER 1999 − REVISED APRIL 2008
DETAILED PIN DESCRIPTION (continued)
Error Amplifier (EAOUT), (EAP), (EAN)
EAOUT connected internally to the non-inverting input of the PWM comparator and the no-load comparator.
EAOUT is internally clamped to the soft-start voltage. The no-load comparator shuts down the output stages
when EAOUT falls below 500 mV, and allows the outputs to turn on again when EAOUT rises above 600 mV.
EAP is the non−inverting and the EAN is the inverting input to the error amplifier.
Output MOSFET Drivers (OUTA, OUTB, OUTC, OUTD)
The 4 outputs are 100-mA complementary MOS drivers, and are optimized to drive MOSFET driver circuits.
OUTA and OUTB are fully complementary, (assuming no programming delay). They operate near 50% duty
cycle and one-half the oscillator frequency. OUTA and OUTB are intended to drive one half-bridge circuit in an
external power stage. OUTC and OUTD drive the other half-bridge and have the same characteristics as OUTA
and OUTB. OUTC is phase shifted with respect to OUTA, and OUTD is phase shifted with respect to OUTB.
NOTE: Changing the phase relationship of OUTC and OUTD with respect to OUTA and OUTB
requires other than the nominal 50% duty ratio on OUTC and OUTD during those transients.
Power Ground (PGND)
To keep output switching noise from critical analog circuits, the UCC3895 has two different ground connections.
PGND is the ground connection for the high-current output stages. Both GND and PGND must be electrically
tied together. Also, since PGND carries high current, board traces must be low impedance.
Inverting Input of the PWM Comparator (RAMP)
This pin receives either the C waveform in voltage and average current-mode controls, or the current signal
T
(plus slope compensation) in peak current-mode control.
Voltage Reference (REF)
The 5 V, 1.2% reference supplies power to internal circuitry, and can also supply up to 5 mA to external loads.
The reference is shut down during undervoltage lockout but is operational during all other disable modes. For
best performance, bypass with a 0.1-µF, low-ESR, low-ESL capacitor to GND. Do not use more than 1.0 µF of
total capacitance on this pin. To ensure the stability of the internal reference.
Oscillator Timing Resistor (RT)
The oscillator in the UCC3895 operates by charging an external timing capacitor, C , with a fixed current
T
programmed by R . R current is calculated as follows:
T
T
3.0 V
I
(A) +
RT
R (W)
T
(4)
R can range from 40 kΩ to 120 kΩ. Soft-start charging and discharging currents are also programmed by I
T
RT
(Refer to Figure 1).
Analog Ground (GND)
This pin is the chip ground for all internal circuits except the output stages.
10
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