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ꢉ
SLUS577C − SEPTEMBER, 2003 − REVISED MARCH 2009
APPLICATION INFORMATION
Multiplier
The output of the multiplier of the UCC3817A is a signal representing the desired input line current. It is an input
to the current amplifier, which programs the current loop to control the input current to give high power factor
operation. As such, the proper functioning of the multiplier is key to the success of the design. The inputs to the
multiplier are VAOUT, the voltage amplifier error signal, I
, a representation of the input rectified ac line
IAC
voltage, and an input voltage feedforward signal, V
as:
. The output of the multiplier, I
, can be expressed
VFF
MOUT
ǒV
* 1Ǔ
VAOUT
I
+ I
IAC
MOUT
2
K V
(9)
VFF
1
V
where K is a constant typically equal to
.
The electrical characteristics table covers all the required operating conditions for designing with the
multiplier. Additionally, curves in Figures 10, 11, and 12 provide typical multiplier characteristics over its entire
operating range.
The I
signal is obtained through a high-value resistor connected between the rectified ac line and the IAC
IAC
pin of the UCC3817A/18A. This resistor (R ) is sized to give the maximum I
UCC3817A/18A the maximum I
current at high line. For the
IAC
IAC
current is about 500 µA. A higher current than this can drive the multiplier
IAC
out of its linear range. A smaller current level is functional, but noise can become an issue, especially at low
input line. Assuming a universal line operation of 85 V to 265 V gives a R value of 750 kΩ. Because
RMS
RMS
IAC
of voltage rating constraints of standard 1/4-W resistor, use a combination of lower value resistors connected
in series to give the required resistance and distribute the high voltage amongst the resistors. For this design
example two 383-kΩ resistors were used in series.
The current into the IAC pin is mirrored internally to the VFF pin where it is filtered to produce a voltage feed
forward signal proportional to line voltage. The VFF voltage is used to keep the power stage gain constant; and
to provid input power limiting. Please refer to Texas Instruments application note SLUA196 for detailed
explanation on how the VFF pin provides power limiting. The following equation can be used to size the VFF
resistor (R
) to provide power limiting where V
is the minimum RMS input voltage and R
is the total
VFF
IN(min)
IAC
resistance connected between the IAC pin and the rectified line voltage.
1.4 V
R
+
[ 30 kW
VFF
V
0.9
IN(min)
2 R
IAC
(10)
11
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