UCC28070-Q1
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SLUSA71A –JULY 2010–REVISED JUNE 2011
Recommended PCB Device Layout
Interleaved PFC techniques dramatically reduce input and output ripple current caused by the PFC boost
inductor, which allows the circuit to use smaller and less expensive filters. To maximize the benefits of
interleaving, the output filter capacitor should be located after the two phases allowing the current of each phase
to be combined together before entering the boost capacitor. Similar to other power management devices, when
laying out the PCB it is important to use star grounding techniques and to keep filter and high frequency bypass
capacitors as close to device pins and ground as possible. To minimize the possibility of interference caused by
magnetic coupling from the boost inductor, the device should be located at least 1 inch away from the boost
inductor. It is also recommended that the device not be placed underneath magnetic elements.
References
1. O'Loughlin, Michael, "An Interleaving PFC Pre-Regulator for High-Power Converters", Texas Instruments,
Inc. 2006 Unitrode Power Supply Seminar, Topic 5
2. Erickson, Robert W., "Fundamentals of Power Electronics", 1st ed., pp. 604-608 Norwell, MA: Kluwer
Academic Publishers, 1997
3. Creel, Kirby "Measuring Transformer Distributed Capacitance", White Paper, Datatronic Distribution, Inc.
website: http://www.datatronics.com/pdf/distributed_capacitance_paper.pdf
4. L. H. Dixon, "Optimizing the Design of a High Power Factor Switching Preregulator", Unitrode Power Supply
Design Seminar Manual SEM700, 1990. Texas Instruments Literature Number SLUP093
5. L. H. Dixon, "High Power Factor Preregulator for Off-Line Power Supplies", Unitrode Power Supply Design
Seminar Manual SEM600, 1988. Texas Instruments Literature Number SLUP087
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