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UC3875N 参数 Datasheet PDF下载

UC3875N图片预览
型号: UC3875N
PDF下载: 下载PDF文件 查看货源
内容描述: 移相谐振控制器 [Phase Shift Resonant Controller]
分类和应用: 控制器
文件页数/大小: 19 页 / 740 K
品牌: TI [ TEXAS INSTRUMENTS ]
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UC1875/6/7/8
UC2875/6/7/8
UC3875/6/7/8
PIN DESCRIPTIONS (cont.)
VC (output switch supply voltage):
This pin supplies
power to the output drivers and their associated bias cir-
cuitry. Connect VC to a stable source above 3V for nor-
mal operation, above 12V for best performance. This
supply should be bypassed directly to the PWRGND pin
with low ESR, low ESL capacitors.
VIN (primary chip supply voltage):
This pin supplies
power to the logic and analog circuitry on the integrated
circuit that is not directly associated with driving the out-
put stages. Connect VIN to a stable source above 12V
for normal operation. To ensure proper chip functionality,
these devices will be inactive until VIN exceeds the up-
per undervoltage lockout threshold. This pin should by
bypassed directly to the GND pin with low ESR, low ESL
capacitors.
NOTE: When VIN exceeds the UVLO threshold the sup-
ply current (I
IN
) will jump from about 100µA to a current
in excess of 20µA. If the UC1875 is not connected to a
well bypassed supply, it may immediately enter UVLO
again.
VREF:
This pin is an accurate 5V voltage reference. This
output is capable of delivering about 60mA to peripheral
circuitry and is internally short circuit current limited.
VREF is disabled while VIN is low enough to force the
chip into UVLO. The circuit is also in UVLO until VREF
reaches approximately 4.75V. For best results bypass
VREF with a 0.1µF, low ESR, low ESL, capacitor to the
GND pin.
APPLICATION INFORMATION
Undervoltage Lockout Section
VIN
GATE
REFERENCE
GENERATOR
INTERNAL
BIAS
10.75V/9.25V
VREF
GND
TO S OFT-
S TART
LOGIC
4.75V
When power is applied to the circuit and VIN is below
the upper UVLO threshold, I
IN
will be below 600µA, the
reference generator will be off, the fault latch is reset,
the soft-start pin is discharged, and the outputs are ac-
tively held low. When VIN exceeds the upper UVLO
threshold, the reference generator turns on. All else re-
mains in the shut-down mode until the output of the ref-
erence, VREF, exceeds 4.75V.
UDG-99136
The high frequency oscillator may be either
free-running
or
externally
synchronized.
For
free-running operation, the frequency is set via an ex-
Simplified Oscillator Schematic
ternal resistor and capacitor to ground from the
FREQSET pin.
UDG-95077
UDG-95079
UDG-95078
7