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UC3875N 参数 Datasheet PDF下载

UC3875N图片预览
型号: UC3875N
PDF下载: 下载PDF文件 查看货源
内容描述: 移相谐振控制器 [Phase Shift Resonant Controller]
分类和应用: 控制器
文件页数/大小: 19 页 / 740 K
品牌: TI [ TEXAS INSTRUMENTS ]
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UC1875/6/7/8
UC2875/6/7/8
UC3875/6/7/8
ELECTRICAL CHARACTERISTICS:
Unless otherwise stated, –55°C < T
A
< 125°C for the UC1875/6/7/8, –25°C < T
A
<
85°C for the UC2875/6/7/8 and 0°C < T
A
< 70°C for the UC3875/6/7/8, VC = VIN = 12V, R
FREQSET
= 12kΩ, C
FREQSET
= 330pF,
R
SLOPE
= 12kΩ, C
RAMP
= 200pF, C
DELAYSET A-B
= C
DELAYSET C-D
= 0.01µF, I
DELAYSET A-B
= I
DELAYSET C-D
= –500µA, T
A
= T
J
.
PARAMETER
Soft-Start/Reset Delay
Charge Current
Discharge Current
Restart Threshold
Discharge Level
Output Drivers
Output Low Level
Output High Level
Delay Set (UC1875 and UC1876 only)
Delay Set Voltage
Delay Time, (Note 8)
I
DELAY
= –500µA
I
DELAY
= –250µA (Note 5) (UC3875/6/7/8,
UC2875/6/7/8)
I
DELAY
= –250µA (Note 5) (UC1875/6/7/8)
2.3
150
150
2.4
250
250
2.6
400
600
V
nsec
nsec
I
OUT
= 50mA
I
OUT
= 500mA
I
OUT
= –50mA
I
OUT
= –500mA
0.2
1.2
1.5
1.7
0.4
2.6
2.5
2.6
V
V
V
V
V
SOFTSTART
= 0.5V
V
SOFTSTART
= 1V
–20
120
4.3
–9
230
4.7
300
–3
µA
µA
V
mV
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Note 1: Phase shift percentage (0% = 0°, 100% = 180°) is defined as
θ =
fined in Figure 1. At 0% phase shift,
F
is the output skew.
200
Φ%,
where
q
is the phase shift, and
F
and T are de-
T
Note 2: Delay time is defined as delay = T (1/2–(duty cycle)), where T is defined in Fig. 1.
Note 3: Ramp offset voltage has a temperature coefficient of about –4mV/°C.
Note 4: Zero phase shift voltage has a temperature coefficient of about –2mV/°C.
62 .5
10
– 12
Note 5: Delay time can be programmed via resistors from the delay set pins to ground. Delay time
sec. Where
I
DELAY
De lay s e t voltage
The recommended range for I
DELAY
is 25mA
£
I
DELAY
£
1mA
I
DELAY
=
R
DELAY
Note 6: Ramp delay to output time is defined in Fig. 2.
Note 7: Not production tested at -55
°
C.
Duty Cycle = t/T
Period = T
UDG-95074
UDG-95075
T
DHL
(A to C) = T
DHL
(B to D) =
Φ
Phase Shift, Output Skew & Delay Time Definitions
Figure 1
5
Figure 2