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SLUS334C − AUGUST 1995 − REVISED AUGUST 2004
ELECTRICAL CHARACTERISTICS
T
R
= −55°C to 125°C for the UC1823A/UC1825A, T = −40°C to 85°C for the UC2823x/UC2825x, T = 0°C to 70°C for the UC3823x/UC3825x,
A A
A
T
= 3.65 kΩ, C = 1 nF, V = 12 V, T = T (unless otherwise noted)
T
CC A J
PARAMETER
REF
TEST CONDITIONS
MIN
TYP
MAX
UNIT
REFERENCE, V
V
Ouput voltage range
Line regulation
T = 25°C,
I = 1 mA
O
5.05
5.1
2
5.15
15
V
O
J
12 V ≤ VCC ≤ 20 V
mV
V
Load regulation
1 mA ≤ I ≤ 10 mA
5
20
O
Total output variation
Temperature stability
Output noise voltage
Line, load, temperature
5.03
30
5.17
(1)
(1)
T
(min)
< T < T
(max)
0.2
50
5
0.4 mV/°C
µV
A
10 Hz < f < 10 kHz
RMS
(1)
Long term stability
T = 125°C, 1000 hours
J
25
90
mV
mA
Short circuit current
OSCILLATOR
VREF = 0 V
60
T = 25°C
375
0.9
400
1
425
1.1
kHz
MHz
kHz
J
(1)
Initial accuracy
f
OSC
R
T
= 6.6 kΩ, C = 220 pF, T = 25°C
T A
Line, temperature
= 6.6 kΩ, C = 220 pF,
350
0.85
450
1.15
1%
(1)
Total variation
R
T
MHz
T
Voltage stability
12 V < VCC < 20 V
< T < T
(max)
(1)
Temperature stability
T
(min)
+/−
3.7
5%
4
A
High-level output voltage, clock
Low-level output voltage, clock
Ramp peak
0
0.2
3
2.6
0.7
1.6
9
2.8
1
V
Ramp valley
1.25
2
Ramp valley-to-peak
Oscillator discharge current
1.8
10
I
OSC
R
T
= OPEN,
V
CT
= 2 V
11
mA
ERROR AMPLIFIER
Input offset voltage
2
0.6
0.1
95
10
3
mV
Input bias current
Input offset current
µA
1
Open loop gain
1 V < V < 4 V
60
75
85
1
O
CMRR Common mode rejection ratio
1.5 V < V
< 5.5 V
< 20 V
95
dB
CM
PSRR
Power supply rejection ratio
Output sink current
12 V < V
CC
110
2.5
−1.3
4.7
0.5
12
I
I
V
= 1 V
O(sink)
EAOUT
EAOUT
EAOUT
EAOUT
mA
V
Output source current
High-level output voltage
Low-level output voltage
Gain bandwidth product
V
= 4 V
−0.5
4.5
0
O(src)
I
I
= −0.5 mA
= −1 mA
5
1
f = 200 kHz
6
Mhz
(1)
Slew rate
6
9
V/µs
(1)
Ensured by design. Not production tested.
4
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