TVP5160
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SLES135E–FEBRUARY 2005–REVISED APRIL 2011
Table 3-145. Analog Output Control 2
Subaddress A0 005Eh
Default
B2h
7
6
5
4
3
2
1
0
Reserved
Gain[3:0]
Analog output PGA gain [3:0]: These bits are effective when analog output AGC is disabled.
Gain[3:0]
0000
0001
1.30
1.56
1.82
2.08
2.34
2.60
2.86
3.12
3.38
3.64
3.90
4.16
4.42
4.68
4.94
5.20
0010 (default)
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Table 3-146. Interrupt Configuration
Subaddress A0 0060h
Default 00h
7
6
5
4
3
2
1
0
Reserved
Polarity
Reserved
Polarity: Interrupt pin polarity
0 = Active high (default)
1 = Active low (open drain, a pullup register is required)
Table 3-147. Interrupt Raw Status 1
Subaddress B0 0069h
Read only
7
6
5
4
3
2
1
0
Reserved
H/V lock: unmasked
H/V lock
Macrovision status changed
Standard changed
Reserved
0 = H/V lock status unchanged
1 = H/V lock status changed
Macrovision status changed: unmasked
0 = Macrovision status unchanged
1 = Macrovision status changed
Standard changed: unmasked
0 = Video standard unchanged
1 = Video standard changed
The masked or unmasked status is set in the interrupt mask 1 register.
Copyright © 2005–2011, Texas Instruments Incorporated
Internal Control Registers
93
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