2
I C Registers
VBUS Registers
00h
00 0000h
HOST
Processor
2
I C
80 051Ch
80 0520h
80 052Ch
80 0600h
CC
WSS
VITC
E0h
VBUS
Data
Line
Mode
E1h
E8h
VBUS[23:0]
80 0700h
90 1904h
VPS
VBUS
Address
FIFO
EAh
FFh
FF FFFFh
VBUS Write
Single Byte
S
B8 ACK E8 ACK VA0 ACK VA1 ACK VA2 ACK
P
P
S
B8 ACK E0 ACK Send Data ACK
P
Multiple Bytes
S
B8 ACK E8 ACK VA0 ACK VA1 ACK VA2 ACK
S
B8 ACK E1 ACK Send Data ACK • • • Send Data ACK
P
VBUS Read
Single Byte
S
B8 ACK E8 ACK VA0 ACK VA1 ACK VA2 ACK P
S
B8 ACK E0 ACK
S
B9 ACK Read Data NAK P
Multiple Bytes
S
B8 ACK E8 ACK VA0 ACK VA1 ACK VA2 ACK P
S
B8 ACK E1 ACK
S
B9 ACK Read Data ACK • • • Read Data NAK P
2
NOTE: Examples use default I C address
ACK = Acknowledge generated by the slave
NAK = No Acknowledge generated by the master
Figure 2−26. VBUS Access
2−19
TI [ TEXAS INSTRUMENTS ]
