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SLVS413C – OCTOBER 2002 – REVISED AUGUST 2007
INPUT CAPACITOR SELECTION
For good input voltage filtering, low ESR ceramic capacitors are recommended. A 4.7
μF
ceramic input capacitor
is sufficient for most of the applications. For better input voltage filtering this value can be increased. See
and typical applications for input capacitor recommendations.
DIODE SELECTION
To achieve high efficiency a Schottky diode should be used. The current rating of the diode should meet the
peak current rating of the converter as it is calculated in the
section. Use the maximum
value for I
LIM
for this calculation. See
and the typical applications for the selection of the Schottky diode.
Table 5. Recommended Schottky Diode for Typical LCD Bias Supply (see
DEVICE
REVERSE VOLTAGE
30 V
TPS61040/41
20 V
20 V
30 V
COMPONENT SUPPLIER
ON Semiconductor MBR0530
ON Semiconductor MBR0520
ON Semiconductor MBRM120L
Toshiba CRS02
High efficiency
COMMENTS
LAYOUT CONSIDERATIONS
Typical for all switching power supplies, the layout is an important step in the design; especially at high peak
currents and switching frequencies. If the layout is not carefully done, the regulator might show noise problems
and duty cycle jitter.
The input capacitor should be placed as close as possible to the input pin for good input voltage filtering. The
inductor and diode should be placed as close as possible to the switch pin to minimize the noise coupling into
other circuits. Because the feedback pin and network is a high-impedance circuit, the feedback network should
be routed away from the inductor. The feedback pin and feedback network should be shielded with a ground
plane or trace to minimize noise coupling into this circuit.
Wide traces should be used for connections in bold as shown in
A star ground connection or ground
plane minimizes ground shifts and noise.
L1
D1
V
O
C
FF
C
O
V
IN
V
IN
SW
FB
R1
C
IN
EN
GND
R2
Figure 15. Layout Diagram
Copyright © 2002–2007, Texas Instruments Incorporated
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