TPS54383, TPS54386
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SLUS774B–AUGUST 2007–REVISED OCTOBER 2007
V
´R2
- V
FB
R4 =
R7 =
V
OUT1
FB
(32)
(33)
V
´R9
- V
FB
V
OUT2
FB
•
•
•
•
R2 = R9 = 20 kΩ
VFB = 0.80 V
R4= 3.80 kΩ (3.83 kΩ standard value is used)
R7= 6.40 kΩ (6.34 kΩ standard value is used)
Compensation Capacitors
Checking the ESR zero of the output capacitors:
1
f
=
ESR(zero)
2´ p´ C´ESR
(34)
•
•
•
C = 100 µF
ESR = 400 mΩ
ESR(zero) = 3980 Hz
Since the ESR zero of the main output capacitor is less than 20 kHz, an R-C filter is added in parallel with R4
and R7 to compensate for the electrolytic capacitors' ESR and add a zero approximately 40 kHz.
R4
R5 =
æ
ç
ç
è
ö
æ
ç
ç
è
ö
÷
÷
ø
fZERO(desired)
÷
-1
÷
fESR(zero)
ø
(35)
•
•
•
•
•
•
fESR(zero) = 4 kHz
fESR(desired) = 40 kHz
R4 = 3.83 kΩ
R5 = 424Ω (422Ω selected)
R7 = 6.34 kΩ
R8 = 702Ω (698Ω selected)
1
R
= R5 +
EQ
æ
ç
è
ö
÷
ø
1
1
æ
ö
æ
ö
+
ç
÷
ç
÷
R2
R4
è
ø
è
ø
(36)
(37)
•
•
•
R2 = R9 = 20 kΩ
REQ1 = 3.63 kΩ
REQ2 = 5.51 kΩ
1
C8 =
2´ p´R ´ f
EQ ESR(zero)
•
•
C8 = 10.9 nF (10 nF selected)
C15 = 7.22 nF (6800 pF selected)
Input Capacitor Selection
The TPS54383 datasheet recommends a minimum 10-µF ceramic input capacitor on each PVDD pin. These
capacitor must be capable of handling the RMS ripple current of the converter. The RMS current in the input
capacitors is estimated by Equation 38.
36
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