TPS54332
www.ti.com
SLVS875B –JANUARY 2009–REVISED FEBRUARY 2012
D -0.5
VOPPMAX
(
)
4 ´ FSW ´ CO
ESRmax
=
-
ILPP
(13)
Where VOPPMAX is the desired maximum peak-to-peak output ripple. The maximum RMS ripple current in the
output capacitor is given by Equation 14.
æ
ç
ö
÷
VOUT × V
- VOUT
(
)
× LOUT × FSW × NC
IN(MAX)
1
ICOUT(RMS)
=
×
ç
÷
V
12
IN(MAX)
è
ø
(14)
The minimum switching frequency should be used in the above equations (derated by a factor of 0.8). For this
design example, two 47-μF ceramic output capacitors are chosen for C2 and C3. These are rated at 10 V with a
maximum ESR of 3 mΩ and a ripple current rating in excess of 3 A. The calculated total RMS ripple current is
300 mA ( 150 mA each) and the total ESR required is 20 mΩ or less. These output capacitors exceed the
requirements by a wide margin and will result in a reliable, high-performance design. it is important to note that
the actual capacitance in circuit may be less than the catalog value when the output is operating at the desired
output of 2.5 V. 10 V rated capacitors are used to minimize the this reduction in capacitance due to dc voltage on
the output. The selected output capacitor must be rated for a voltage greater than the desired output voltage plus
½
the ripple voltage. Any derating amount must also be included. Other capacitor types work well with the
TPS54332, depending on the needs of the application.
COMPENSATION COMPONENTS
The external compensation used with the TPS54332 allows for a wide range of output filter configurations. A
large range of capacitor values and types of dielectric are supported. The design example uses ceramic X5R
dielectric output capacitors, but other types are supported.
A Type II compensation scheme is recommended for the TPS54332. The compensation components are chosen
to set the desired closed loop cross over frequency and phase margin for output filter components. The type II
compensation has the following characteristics; a dc gain component, a low frequency pole, and a mid frequency
zero / pole pair.
The dc gain is determined by Equation 15:
Vggm ´ VREF
GDC
=
VO
(15)
Where:
Vggm = 800
VREF = 0.8 V
The low-frequency pole is determined by Equation 16:
= 1/ 2 ´ p ´ R ´CZ
F
(
)
PO
OO
(16)
ROA = 8.696 MΩ.
The mid-frequency zero is determined by Equation 17:
FZ1 = 1/ 2 ´ p ´ R ´CZ
(
)
Z
(17)
(18)
And, the mid-frequency pole is given by Equation 18:
= 1/ 2 ´ p ´ R ´CP
F
(
)
P1
Z
The first step is to choose the closed loop crossover frequency. The closed-loop crossover frequency should be
less than 1/8 of the minimum operating frequency, but for the TPS54332 it is recommended that the maximum
closed loop crossover frequency be not greater than 75 kHz. Next, the required gain and phase boost of the
crossover network needs to be calculated. By definition, the gain of the compensation network must be the
inverse of the gain of the modulator and output filter. For this design example, where the ESR zero is much
higher than the closed loop crossover frequency, the gain of the modulator and output filter can be approximated
by Equation 19:
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