SLVS632E – JANUARY 2006 – REVISED SEPTEMBER 2013
PIN ASSIGNMENTS
DDA PACKAGE
(TOP VIEW)
BOOT
NC
NC
VSENSE
1
2
3
4
PowerPAD
(Pin 9)
8
7
6
5
PH
VIN
GND
ENA
TERMINAL FUNCTIONS
TERMINAL
NAME
BOOT
NC
VSENSE
ENA
GND
VIN
PH
PowerPAD
NO.
1
2, 3
4
5
6
7
8
9
Not connected internally.
Feedback voltage for the regulator. Connect to output voltage divider.
On/off control. Below 0.5 V, the device stops switching. Float the pin to enable.
Ground. Connect to PowerPAD.
Input supply voltage. Bypass VIN pin to GND pin close to device package with a high quality, low ESR ceramic
capacitor.
Source of the high side power MOSFET. Connected to external inductor and diode.
GND pin must be connected to the exposed pad for proper operation.
DESCRIPTION
Boost capacitor for the high-side FET gate driver. Connect 0.01
μF
low ESR capacitor from BOOT pin to PH pin.
Copyright © 2006–2013, Texas Instruments Incorporated
5
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