TPS54311, TPS54312
TPS54313, TPS54314
TPS54315, TPS54316
SLVS416A – FEBRUARY 2002 – JULY 2003
www.ti.com
APPLICATION INFORMATION
Figure 10 shows the schematic diagram for a typical
TPS54314 application. The TPS54314 (U1) can provide
up to 3 A of output current at a nominal output voltage of
J1
VI
GND
2
1
+
C2
1
R1
10 kΩ
U1
TPS54314PWP
1
AGND
RT
20
19
18
17
16
15
14
13
12
11
C8
10
µF
C3
0.1
µF
R7
71.5 kΩ
1.8 V. For proper thermal performance, the PowerPAD
underneath the TPS54314 integrated circuit needs to be
soldered to the printed circuit board.
PWRGD
L1
5.2
µH
1
2
C11
1000 pF
+ C9
470
µF
4V
C7
0.047
µF
J3
VO
GND
2 VSENSE
FSEL
3
SS/ENA
NC
4 PWRGD
VBIAS
5 BOOT
VIN
6 PH
VIN
7
PH
VIN
8
PH
PGND
9
PGND
PH
10
PH
PGND
PwrPAD
1
Optional
Figure 10. TPS54314 Schematic
INPUT VOLTAGE
The input to the circuit is a nominal 5 VDC, applied at J1.
The optional input filter (C2) is a 220-µF POSCAP
capacitor, with a maximum allowable ripple current of 3 A.
C8 is the decoupling capacitor for the TPS54314 and must
be located as close to the device as possible.
The output filter components work with the internal
compensation network to provide a stable closed loop
response for the converter.
GROUNDING AND PowerPAD LAYOUT
The TPS54311–16 have two internal grounds (analog and
power). Inside the TPS54311–16, the analog ground ties
to all of the noise sensitive signals, while the power ground
ties to the noisier power signals. The PowerPAD must be
connected directly to AGND. Noise injected between the
two grounds can degrade the performance of the
TPS54311–16, particularly at higher output currents.
However, ground noise on an analog ground plane can
also cause problems with some of the control and bias
signals. For these reasons, separate analog and power
ground planes are recommended. These two planes
should tie together directly at the IC to reduce noise
between the two grounds. The only components that
should tie directly to the power ground plane are the input
capacitor, the output capacitor, the input voltage
decoupling capacitor, and the PGND pins of the
TPS54311–16. The layout of the TPS54314 evaluation
module is representative of a recommended layout for a
4-layer board. Documentation for the TPS54314
evaluation module can be found on the Texas Instruments
web site under the TPS54314 product folder and in the
application note, TI literature number SLVA111.
FEEDBACK CIRCUIT
The output voltage of the converter is fed directly into the
VSENSE pin of the TPS54314. The TPS54314 is
internally compensated to provide stability of the output
under varying line and load conditions.
OPERATING FREQUENCY
In the application circuit, a 700 kHz operating frequency is
selected by leaving FSEL open and connecting a 71.5 kΩ
resistor between the RT pin and AGND. Different
operating frequencies may be selected by varying the
value of R3 using equation 1:
R
+
500 kHz
Switching Frequency
100 kW
(1)
Alternately, preset operating frequencies of 350 kHz or
550 kHz my be selected by leaving RT open and
connecting the FSEL pin to AGND or VIN respectively.
OUTPUT FILTER
The output filter is composed of a 5.2-µH inductor and
470-µF capacitor. The inductor is a low dc resistance
(16-mΩ) type, Sumida CDRH104R–5R2. The capacitor
used is a 4-V POSCAP with a maximum ESR of 40 mΩ.
8
LAYOUT CONSIDERATIONS FOR THERMAL
PERFORMANCE
For operation at full rated load current, the analog ground
plane must provide adequate heat dissipating area. A 3
inch by 3 inch plane of 1 ounce copper is recommended,
TI [ TEXAS INSTRUMENTS ]
