SLVS841C – NOVEMBER 2008 – REVISED SEPTEMBER 2009......................................................................................................................................
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This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields.
These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to
MIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than
maximum-rated voltages to these high-impedance circuits. During storage or handling the device leads should be shorted together
or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriate logic
voltage level, preferably either VCC or ground. Specific guidelines for handling devices of this type are contained in the publication
Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.
AVAILABLE OPTIONS AND ORDERING INFORMATION
DEVICE
(1)
TPS2552
TPS2553
TPS2552-1
TPS2553-1
(1)
(2)
(3)
–40°C to 85°C
AMBIENT
TEMPERATURE
(2)
ENABLE
Active low
Active high
Active low
SON
(3)
(DRV)
TPS2552DRV
TPS2553DRV
TPS2552DRV-1
SOT23
(3)
(DBV)
TPS2552DBV
TPS2553DBV
TPS2552DBV-1
TPS2553DBV-1
RECOMMENDED MAXIMUM
CONTINUOUS LOAD
CURRENT
(2)
CURRENT-LIMIT
PROTECTION
Constant-Current
1.5 A
Latch-Off
Active high TPS2553DRV-1
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at
Maximum ambient temperature is a function of device junction temperature and system level considerations, such as load current,
power dissipation and board layout. See
dissipation rating table
and
recommended operating conditions
for specific information related
to these devices.
Add an R suffix to the device type for tape and reel.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
Voltage range on IN, OUT, EN or EN, ILIM, FAULT
Voltage range from IN to OUT
I
O
Continuous output current
Continuous total power dissipation
Continuous FAULT sink current
ILIM source current
ESD
T
J
T
stg
(1)
(2)
HBM
CDM
(2)
VALUE
–0.3 to 7
–7 to 7
Internally Limited
See the Dissipation Rating
Table
25
1
2
500
–40 to 150
–65 to 150
UNIT
V
V
mA
mA
kV
V
°C
°C
Maximum junction temperature
Storage temperature
Stresses beyond those listed under
absolute maximum ratings
may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
recommended operating
conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Voltages are referenced to GND unless otherwise noted.
DISSIPATION RATING TABLE
BOARD
Low-K
(1)
High-K
High-K
(1)
(2)
(2)
PACKAGE
DBV
DBV
DRV
DRV
THERMAL
RESISTANCE
θ
JA
350°C/W
160°C/W
140°C/W
75°C/W
THERMAL
RESISTANCE
θ
JC
55°C/W
55°C/W
20°C/W
20°C/W
T
A
≤
25°C
POWER
RATING
285 mW
625 mW
715 mW
1330 mW
DERATING
FACTOR ABOVE
T
A
= 25°C
2.85 mW/°C
6.25 mW/°C
7.1 mW/°C
13.3 mW/°C
T
A
= 70°C
POWER
RATING
155 mW
340 mW
395 mW
730 mW
T
A
= 85°C
POWER
RATING
114 mW
250 mW
285 mW
530 mW
Low-K
(1)
(2)
The JEDEC low-K (1s) board used to derive this data was a 3in × 3in, two-layer board with 2-ounce copper traces on top of the board.
The JEDEC high-K (2s2p) board used to derive this data was a 3in × 3in, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
2
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