TPA2012D2
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SLOS438C–DECEMBER 2004–REVISED MARCH 2007
APPLICATION INFORMATION
To Battery
4.7 mF
1 mF
0.1 mF
PV
*
DD
AV
DD
0.1 mF
INL−
OUTL+
1 nF
1 nF
1 nF
INL+
0.1 mF
0.1 mF
OUTL−
DAC
INR−
INR+
OUTR+
OUTR−
0.1 mF
Shutdown
Control
SDL
SDR
G0
G1
1 nF
PGND
AGND
* For QFN, an additional capacitor is recomended for the second PV pin.
DD
Figure 33. Typical Application Circuit
to Battery
V
DD
to Battery
V
DD
C
S
C
I
C
S
INR+
INR−
OUTR+
OUTR−
Right
Differential
Input
H −
Bridge
INR+
INR−
Gain
Adjust
OUTR+
OUTR−
PWM
Right
Single−Ended
Input
H −
Bridge
Gain
Adjust
C
I
PWM
C
C
I
C
I
Internal
Oscillator
GND
Internal
Oscillator
GND
I
INL+
INL−
OUTL+
OUTL−
INL+
INL−
OUTL+
OUTL−
Left
Differential
Input
Gain
Adjust
H −
Bridge
Left
Single−Ended
Input
PWM
Gain
Adjust
H −
Bridge
C
I
PWM
C
I
C
I
G0
G1
G0
G1
SDR
SDR
300 k
300 k
300 k
300 k
Bias
Circuitry
Bias
Circuitry
Short−Circuit
Protection
Short−Circuit
Protection
SDL
SDL
Figure 35. TPA2012D2 Application Schematic
With Single-Ended Input
Figure 34. TPA2012D2 Application Schematic
With Differential Input and Input Capacitors
11
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