TPA2010D1
www.ti.com
SLOS417B–OCTOBER 2003–REVISED JULY 2006
Table 2. Land Pattern Dimensions
SOLDER PAD
DEFINITIONS
SOLDER MASK
OPENING
COPPER
THICKNESS
STENCIL
OPENING
STENCIL
THICKNESS
COPPER PAD
Nonsolder mask
defined (NSMD)
275 µm
(+0.0, –25 µm)
375 µm
(+0.0, –25 µm)
1 oz max (32 µm) 275 µm x 275 µm Sq.
(rounded corners)
125 µm thick
NOTES:
1. Circuit traces from NSMD defined PWB lands should be 75 µm to 100 µm wide in the exposed area inside
the solder mask opening. Wider trace widths reduce device stand off and impact reliability.
2. Recommend solder paste is Type 3 or Type 4.
3. Best reilability results are achieved when the PWB laminate glass transition temperature is above the
operating the range of the intended application.
4. For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 µm to avoid a reduction in
thermal fatigue performance.
5. Solder mask thickness should be less than 20 µm on top of the copper circuit pattern.
6. Best solder stencil preformance is achieved using laser cut stencils with electro polishing. Use of chemically
etched stencils results in inferior solder paste volume control.
7. Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentional
component movement due to solder wetting forces.
Component Location
Place all the external components very close to the TPA2010D1. The input resistors need to be very close to the
TPA2010D1 input pins so noise does not couple on the high impedance nodes between the input resistors and
the input amplifier of the TPA2010D1. Placing the decoupling capacitor, CS, close to the TPA2010D1 is
important for the efficiency of the class-D amplifier. Any resistance or inductance in the trace between the device
and the capacitor can cause a loss in efficiency.
Trace Width
Recommended trace width at the solder balls is 75 µm to 100 µm to prevent solder wicking onto wider PCB
traces. Figure 34 shows the layout of the TPA2010D1 evaluation module (EVM).
For high current pins (VDD, GND VO+, and VO-) of the TPA2010D1, use 100-µm trace widths at the solder balls
and at least 500-µm PCB traces to ensure proper performance and output power for the device.
For input pins (IN-, IN+, and SHUTDOWN) of the TPA2010D1, use 75-µm to 100-µm trace widths at the solder
balls. IN- and IN+ pins need to run side-by-side to maximize common-mode noise cancellation. Placing input
resistors, RIN, as close to the TPA2010D1 as possible is recommended.
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