TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
www.ti.com
SPRS439I–JUNE 2007–REVISED MARCH 2011
Digital Signal Controllers (DSCs)
Check for Samples: TMS320F28335, TMS320F28334, TMS320F28332, TMS320F28235, TMS320F28234, TMS320F28232
1
TMS320F2833x, TMS320F2823x DSCs
1.1 Features
123
• High-Performance Static CMOS Technology
– Up to 150 MHz (6.67-ns Cycle Time)
• Enhanced Control Peripherals
– Up to 18 PWM Outputs
– 1.9-V/1.8 -V Core, 3.3-V I/O Design
• High-Performance 32-Bit CPU (TMS320C28x)
– Up to 6 HRPWM Outputs With 150 ps MEP
Resolution
– Up to 6 Event Capture Inputs
– Up to 2 Quadrature Encoder Interfaces
– Up to 8 32-Bit/Nine 16-Bit Timers
• Three 32-Bit CPU Timers
– IEEE-754 Single-Precision Floating-Point
Unit (FPU) (F2833x only)
– 16 x 16 and 32 x 32 MAC Operations
– 16 x 16 Dual MAC
– Harvard Bus Architecture
• Serial Port Peripherals
– Fast Interrupt Response and Processing
– Unified Memory Programming Model
– Code-Efficient (in C/C++ and Assembly)
– Up to 2 CAN Modules
– Up to 3 SCI (UART) Modules
– Up to 2 McBSP Modules (Configurable as
SPI)
– One SPI Module
• Six-Channel DMA Controller (for ADC, McBSP,
ePWM, XINTF, and SARAM)
• 16-Bit or 32-Bit External Interface (XINTF)
– Over 2M x 16 Address Reach
• On-Chip Memory
– One Inter-Integrated-Circuit (I2C) Bus
• 12-Bit ADC, 16 Channels
– 80-ns Conversion Rate
– F28335/F28235: 256K x 16 Flash, 34K x 16
SARAM
– 2 x 8 Channel Input Multiplexer
– Two Sample-and-Hold
– F28334/F28234: 128K x 16 Flash, 34K x 16
SARAM
– F28332/F28232: 64K x 16 Flash, 26K x 16
SARAM
– Single/Simultaneous Conversions
– Internal or External Reference
• Up to 88 Individually Programmable,
Multiplexed GPIO Pins With Input Filtering
– 1K x 16 OTP ROM
• Boot ROM (8K x 16)
(1)
• JTAG Boundary Scan Support
• Advanced Emulation Features
– Analysis and Breakpoint Functions
– Real-Time Debug via Hardware
• Development Support Includes
– ANSI C/C++ Compiler/Assembler/Linker
– Code Composer Studio™ IDE
– DSP/BIOS™
– Digital Motor Control and Digital Power
Software Libraries
• Low-Power Modes and Power Savings
– IDLE, STANDBY, HALT Modes Supported
– Disable Individual Peripheral Clocks
– With Software Boot Modes (via SCI, SPI,
CAN, I2C, McBSP, XINTF, and Parallel I/O)
– Standard Math Tables
• Clock and System Control
– Dynamic PLL Ratio Changes Supported
– On-Chip Oscillator
– Watchdog Timer Module
• GPIO0 to GPIO63 Pins Can Be Connected to
One of the Eight External Core Interrupts
• Peripheral Interrupt Expansion (PIE) Block That
Supports All 58 Peripheral Interrupts
• 128-Bit Security Key/Lock
– Protects Flash/OTP/RAM Blocks
– Prevents Firmware Reverse Engineering
(1) IEEE Standard 1149.1-1990 Standard Test Access Port and
Boundary Scan Architecture
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
MicroStar BGA, Code Composer Studio, DSP/BIOS, TMS320C28x, Delfino, PowerPAD, TMS320C54x, TMS320C55x, C28x are trademarks
of Texas Instruments.
All other trademarks are the property of their respective owners.
3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2011, Texas Instruments Incorporated
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