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SPRS439I – JUNE 2007 – REVISED MARCH 2011
Unless otherwise specified, all XINTF timing is applicable for the clock configurations shown in
Table 6-37. XINTF Clock Configurations
MODE
1
Example:
2
Example:
3
Example:
4
Example:
150 MHz
150 MHz
150 MHz
150 MHz
SYSCLKOUT
XTIMCLK
SYSCLKOUT
150 MHz
SYSCLKOUT
150 MHz
1/2 SYSCLKOUT
75 MHz
1/2 SYSCLKOUT
75 MHz
XCLKOUT
SYSCLKOUT
150 MHz
1/2 SYSCLKOUT
75 MHz
1/2 SYSCLKOUT
75 MHz
1/4 SYSCLKOUT
37.5 MHz
The relationship between SYSCLKOUT and XTIMCLK is shown in
.
PCLKR3[XINTFENCLK]
XTIMING0
0
0
1
XTIMING6
XTIMING7
XBANK
LEAD/ACTIVE/TRAIL
C28x
CPU
SYSCLKOUT
/2
1
0
XTIMCLK
/2
1
0
XCLKOUT
XINTCNF2 (XTIMCLK)
XINTCNF2
(CLKMODE)
XINTCNF2
(CLKOFF)
Figure 6-22. Relationship Between XTIMCLK and SYSCLKOUT
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Electrical Specifications
153
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