TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
www.ti.com
SPRS439I–JUNE 2007–REVISED MARCH 2011
4.3 Enhanced PWM Modules (ePWM1/2/3/4/5/6 )
The 2833x/2823x devices contain up to six enhanced PWM Modules (ePWM). Figure 4-4 shows a block
diagram of multiple ePWM modules. Figure 4-4 shows the signal interconnections with the ePWM.
Table 4-2 show the complete ePWM register set per module and Table 4-3 shows the remapped register
configuration.
EPWM1SYNCI
EPWM1SYNCI
EPWM1INT
EPWM1A
EPWM1SOC
ePWM1 module
EPWM1B
TZ1 to TZ6
to eCAP1
and ePWM4
module
EPWM1SYNCO
.
EPWM1SYNCO
(sync in)
EPWM2SYNCI
ePWM2 module
EPWM2SYNCO
EPWM2INT
EPWM2A
EPWM2B
TZ1 to TZ6
EPWM2SOC
PIE
GPIO
MUX
EPWMxSYNCI
ePWMx module
EPWMxINT
EPWMxA
EPWMxB
EPWMxSOC
TZ1 to TZ6
EPWMxSYNCO
ADCSOCxO(A)
Peripheral Bus
ADC
A. ADCSOCxO is sent to the DMA as well when the ePWM registers are remapped to PF3 (through bit 0 of the
MAPCNF register).
B. By default, ePWM/HRPWM registers are mapped to Peripheral Frame 1 (PF1). Table 4-2 shows this configuration. To
re-map the registers to Peripheral Frame 3 (PF3) to enable DMA access, bit 0 (MAPEPWM) of MAPCNF register
(address 0x702E) must be set to 1. Table 4-3 shows the remapped configuration.
Figure 4-4. Multiple PWM Modules in an 2833x/2823x System
Copyright © 2007–2011, Texas Instruments Incorporated
Peripherals
69
Submit Documentation Feedback
Product Folder Link(s): TMS320F28335 TMS320F28334 TMS320F28332 TMS320F28235 TMS320F28234
TMS320F28232
TI [ TEXAS INSTRUMENTS ]
