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TMS320VC5416
Fixed-Point Digital Signal Processor
SPRS095O – MARCH 1999 – REVISED JANUARY 2005
3.12.3
DMA Memory Maps
The DMA memory maps, shown in Figure 3-17 and Figure 3-18, allows the DMA transfer to be unaffected
by the status of the MP/MC, DROM, and OVLY bits.
Hex
0000
005F
0060
DLAXS = 0
SLAXS = 0
Program
Reserved
On-Chip
DARAM0
8K Words
On-Chip
DARAM1
8K Words
Reserved
On-Chip
DARAM2
8K Words
On-Chip
DARAM3
8K Words
Reserved
Hex
010000
Program
Hex
0x0000
Program
Hex
xx0000
Program
1FFF
2000
3FFF
4000
5FFF
6000
7FFF
8000
017FFF
018000
0x7FFF
On-Chip
DARAM 4
8K Words
On-Chip
DARAM 5
8K Words
0x8000
Reserved
On-Chip
SARAM 0/4
8K Words
On-Chip
SARAM 1/5
8K Words
0xBFFF
0xC000
On-Chip
SARAM 2/6
8K Words
0xDFFF
0xE000
On-Chip
SARAM 3/7
8K Words
0xFFFF
xxFFFF
Page 2 − 3
Page 4 − 127
019FFF
01A000
0x9FFF
0xA000
01BFFF
01C000
Reserved
01DFFF
01E000
On-Chip
DARAM 7
8K Words
FFFF
Page 0
01FFFF
Page 1
On-Chip
DARAM 6
8K Words
Figure 3-17. On-Chip DMA Memory Map for Program Space (DLAXS = 0 and SLAXS = 0)
Functional Overview
39
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