TMS320VC5402
FIXED POINT DIGITAL SIGNAL PROCESSOR
SPRS079E – OCTOBER 1998 – REVISED AUGUST 2000
instruction acquisition (IAQ), interrupt acknowledge (IACK), external flag (XF), and TOUT timings
switching characteristics over recommended operating conditions for IAQ and IACK
[H = 0.5 t
c(CO)
] (see Figure 25)
PARAMETER
td(CLKL-IAQL)
td(CLKL-IAQH)
td(A)IAQ
td(CLKL-IACKL)
td(CLKL-IACKH)
td(A)IACK
th(A)IAQ
th(A)IACK
tw(IAQL)
tw(IACKL)
Delay time, CLKOUT low to IAQ low
Delay time, CLKOUT low to IAQ high
Delay time, address valid to IAQ low
Delay time, CLKOUT low to IACK low
Delay time , CLKOUT low to IACK high
Delay time, address valid to IACK low
Hold time, IAQ high after address invalid
Hold time, IACK high after address invalid
Pulse duration, IAQ low
Pulse duration, IACK low
–2
–2
2H–2
2H–2
–1
–1
MIN
–1
–1
MAX
3
3
1
3
3
3
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CLKOUT
A[19:0]
td(CLKL-IAQL)
td(A)IAQ
IAQ
tw(IAQL)
td(CLKL-IAQH)
th(A)IAQ
td(CLKL-IACKL)
td(A)IACK
IACK
tw(IACKL)
td(CLKL-IACKH)
th(A)IACK
MSTRB
Figure 25. IAQ and IACK Timings
52
POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77251–1443
TI [ TEXAS INSTRUMENTS ]
