ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢆ ꢇ ꢄꢈꢈ ꢉ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢄ ꢈꢈ ꢊ
ꢕ
ꢋ
ꢌ
ꢍꢎ
ꢏ
ꢐ
ꢑ
ꢒ
ꢌ
ꢓ
ꢀ
ꢏ
ꢌ
ꢔꢌ
ꢀꢕ
ꢖ
ꢂ
ꢌ
ꢔ
ꢓ
ꢖ
ꢑ
ꢗ
ꢒ
ꢆ
ꢎ
ꢂ
ꢂ
ꢒ
ꢗ
ꢂ
SPRS073L − AUGUST 1998 − REVISED JUNE 2004
TIMER TIMING
†
timing requirements for timer inputs (see Figure 43)
−150
−167
NO.
UNIT
MIN
MAX
1
2
t
t
Pulse duration, TINP high
Pulse duration, TINP low
2P
2P
ns
ns
w(TINPH)
w(TINPL)
†
P = 1/CPU clock frequency in ns. For example, when running parts at 167 MHz, use P = 6 ns.
†
switching characteristics over recommended operating conditions for timer outputs
(see Figure 43)
−150
−167
NO.
PARAMETER
UNIT
MIN
MAX
3
4
t
t
Pulse duration, TOUT high
Pulse duration, TOUT low
4P−3
4P−3
ns
ns
w(TOUTH)
w(TOUTL)
†
P = 1/CPU clock frequency in ns. For example, when running parts at 167 MHz, use P = 6 ns.
2
1
TINPx
4
3
TOUTx
Figure 43. Timer Timing
80
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443