ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉꢄ ꢅ
ꢊ ꢋ ꢌꢍ ꢎꢏꢐ ꢑꢋ ꢒ ꢀ ꢎ ꢋ ꢓꢋ ꢀꢔꢕ ꢂ ꢋ ꢓꢒ ꢔꢕ ꢐ ꢖꢑ ꢇꢍꢂ ꢂꢑ ꢖ
SPRS080F − MARCH 1999 − REVISED OCTOBER 2008
Table of Contents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Multicore Reset Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
On-Chip Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
16-bit Host-Port Interface (HPI16) . . . . . . . . . . . . . . . . . . 24
Multichannel Buffered Serial Port (McBSP) . . . . . . . . . . . 26
Direct Memory Access Unit (DMA) . . . . . . . . . . . . . . . . . . 27
Subsystem Communications . . . . . . . . . . . . . . . . . . . . . . . 29
General-Purpose I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Memory-Mapped Registers . . . . . . . . . . . . . . . . . . . . . . . . 33
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
IDLE3 Power-Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . 39
Emulating the 5420 Device . . . . . . . . . . . . . . . . . . . . . . . . 39
Documentation Support . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . 41
Recommended Operating Conditions . . . . . . . . . . . . . . . 41
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 42
External Multiply-By-N Clock Option . . . . . . . . . . . . . . . . 43
Bypass Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
External Memory Interface Timing for One Wait State . . 45
Ready Timing for Externally Generated Wait States . . . 49
Parallel I/O Interface Timing . . . . . . . . . . . . . . . . . . . . . . . 51
I/O Port Timing for Externally Generated Wait States . . 53
Reset, BIO, Interrupt, and XIO Timing . . . . . . . . . . . . . . . 55
External Flag (XF) and Timer Output (TOUT) Timing . . 57
General-Purpose Input/Output (GPIO) Timing . . . . . . . . 58
SELA/B Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Multichannel Buffered Serial Port Timing . . . . . . . . . . . . . 60
HPI16 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
REVISION HISTORY
REVISION
DATE
March 1999
PRODUCT STATUS
HIGHLIGHTS
*
Advance Information
Original
A
B
C
D
April 1999
Advance Information
Production Data
Production Data
Production Data
Updated characteristics data.
Updated characteristics data.
Updated characteristics data.
Updated characteristics data.
September 1999
April 2000
June 2000
Removed 4K × 16-bit block of on-chip memory labeled SARAM4.
This is no longer a supported feature of this device.
E
April 2001
Production Data
Signal Descriptions table:
−
Added footnote about TRST
Mechanical Data section:
−
−
−
Added paragraph about packaging information
Added “Package Thermal Resistance Characteristics” section
Mechanical drawings will be appended to this document via an
automated process
F
October 2008
Production Data
2
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