TMS320VC5420
FIXED POINT DIGITAL SIGNAL PROCESSOR
SPRS080F − MARCH 1999 − REVISED OCTOBER 2008
Pin Assignments for the TMS320VC5420PGE
(144-Pin Low-Profile Quad Flatpack) (Continued)
PRIMARY
SIGNAL NAME
PPA10
DVDD
PPA12
HPIRS
B_CLKOUT
B_RS
TEST
CVDD
B_BDX1
B_BFSX1
VSS
B_BDR1
B_GPIO0
B_GPIO2/BIO
B_NMI
B_INT0
PPA16
PPA15
PPA7
PPA4
PPA5
PPD3
B_BFSR2
VSS
B_BCLKR2
B_BDX2
VSS
VSSA
CLKIN
READY
CVDD
A_BCLKR2
A_BFSR2
A_BFSX2
PPD4
PPD0
HD4
HD0
HRDY
HD3
HAS
SECONDARY
SIGNAL NAME
PIN
NO.
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
PRIMARY
SIGNAL NAME
PPA11
VSS
PPA13
HMODE
B_XF
XIO
VSS
B_BCLKX1
VSS
B_BCLKR1
CVDD
B_BFSR1
B_GPIO1
IS
B_INT1
PPA17
VSS
PPA14
PPA6
DVDD
PPA1
PPD2
B_BDR2
CVDD
B_BFSX2
B_BCLKX2
AVDD
NC
DVDD
A_BCLKX2
VSS
A_BDR2
A_BDX2
PPD6
PPD5
VSS
HD6
HD5
B_HINT
HD2
B_GPIO3
SECONDARY
SIGNAL NAME
PIN
NO.
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
POST OFFICE BOX 1443
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HOUSTON, TEXAS 77251−1443
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TI [ TEXAS INSTRUMENTS ]
