Electrical Specifications
Table 5–31. McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 1)
†
MASTER
MIN
MAX
SLAVE
MIN
2 – 6P‡
5 + 12P‡
MAX
UNIT
ns
ns
tsu(BDRV-BCKXL) Setup time, BDR valid before BCLKX low
12
th(BCKXL-BDRV)
Hold time, BDR valid after BCLKX low
4
† For all SPI slave modes, CLKG is programmed as 1/2 of the CPU clock by setting CLKSM = CLKGDV = 1.
‡ P = 0.5 * processor clock
Table 5–32. McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 1)
†
MASTER§
PARAMETER
th(BCKXH-BFXL)
td(BFXL-BCKXL)
td(BCKXH-BDXV)
tdis(BCKXH-BDXHZ)
Hold time, BFSX low after BCLKX high¶
Delay time, BFSX low to BCLKX low#
Delay time, BCLKX high to BDX valid
Disable time, BDX high impedance following last data bit from
BCLKX high
MIN
D–3
T–4
–4
–2
MAX
D+4
T+3
5 6P + 2‡
4
6P – 4‡
10P + 17‡
10P + 17‡
SLAVE
MIN
MAX
UNIT
ns
ns
ns
ns
td(BFXL-BDXV)
Delay time, BFSX low to BDX valid
C – 2 C + 4 4P + 2‡
8P + 17‡
ns
† For all SPI slave modes, CLKG is programmed as 1/2 of the CPU clock by setting CLKSM = CLKGDV = 1.
‡ P = 0.5 * processor clock
§ T = BCLKX period = (1 + CLKGDV) * 2P
C = BCLKX low pulse width = T/2 when CLKGDV is odd or zero and = (CLKGDV/2) * 2P when CLKGDV is even
D = BCLKX high pulse width = T/2 when CLKGDV is odd or zero and = (CLKGDV/2 + 1) * 2P when CLKGDV is even
¶ FSRP = FSXP = 1. As a SPI master, BFSX is inverted to provide active-low slave-enable output. As a slave, the active-low signal input on BFSX
and BFSR is inverted before being used internally.
CLKXM = FSXM = 1, CLKRM = FSRM = 0 for master McBSP
CLKXM = CLKRM = FSXM = FSRM = 0 for slave McBSP
# BFSX should be low before the rising edge of clock to enable slave devices and then begin a SPI transfer at the rising edge of the master clock
(BCLKX).
LSB
BCLKX
th(BCKXH-BFXL)
BFSX
tdis(BCKXH-BDXHZ)
BDX
Bit 0
tsu(BDRV-BCKXL)
BDR
Bit 0
td(BFXL-BDXV)
MSB
td(BFXL-BCKXL)
td(BCKXH-BDXV)
Bit(n-1)
(n-2)
(n-3)
(n-4)
th(BCKXL-BDRV)
Bit(n-1)
(n-2)
(n-3)
(n-4)
Figure 5–27. McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 1
November 2001 – Revised July 2003
SPRS007B
87
TI [ TEXAS INSTRUMENTS ]
