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TMS320VC5407PGER 参数 Datasheet PDF下载

TMS320VC5407PGER图片预览
型号: TMS320VC5407PGER
PDF下载: 下载PDF文件 查看货源
内容描述: [IC,DSP,16-BIT,QFP,144PIN,PLASTIC]
分类和应用:
文件页数/大小: 107 页 / 1364 K
品牌: TI [ TEXAS INSTRUMENTS ]
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Functional Overview
Table 3–3. Software Wait-State Register (SWWSR) Bit Fields
BIT
NO.
15
NAME
XPA
RESET
VALUE
0
FUNCTION
Extended program address control bit. XPA is used in conjunction with the program space fields
(bits 0 through 5) to select the address range for program space wait states.
I/O space. The field value (0–7) corresponds to the base number of wait states for I/O space accesses
within addresses 0000–FFFFh. The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for
the base number of wait states.
Upper data space. The field value (0–7) corresponds to the base number of wait states for external
data space accesses within addresses 8000–FFFFh. The SWSM bit of the SWCR defines a
multiplication factor of 1 or 2 for the base number of wait states.
Lower data space. The field value (0–7) corresponds to the base number of wait states for external
data space accesses within addresses 0000–7FFFh. The SWSM bit of the SWCR defines a
multiplication factor of 1 or 2 for the base number of wait states.
Upper program space. The field value (0–7) corresponds to the base number of wait states for external
program space accesses within the following addresses:
5–3
Program
111
-
-
XPA = 0: xx8000 – xxFFFFh
XPA = 1: 400000h – 7FFFFFh
14–12
I/O
111
11–9
Data
111
8–6
Data
111
The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for the base number of wait states.
Lower program space. The field value (0–7) corresponds to the base number of wait states for external
program space accesses within the following addresses:
2–0
Program
111
-
-
XPA = 0: xx0000 – xx7FFFh
XPA = 1: 000000 – 3FFFFFh
The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for the base number of wait states.
The software wait-state multiplier bit of the software wait-state control register (SWCR) is used to extend the
base number of wait states selected by the SWWSR. The SWCR bit fields are shown in Figure 3–8 and
described in Table 3–4.
15
Reserved
R/W-0
1
Reserved
R/W-0
LEGEND:
R = Read, W = Write,
n = value after reset
0
SWSM
R/W-0
Figure 3–8. Software Wait-State Control Register (SWCR) [MMR Address 002Bh]
Table 3–4. Software Wait-State Control Register (SWCR) Bit Fields
PIN
NO.
15–1
NAME
Reserved
RESET
VALUE
0
FUNCTION
These bits are reserved and are unaffected by writes.
Software wait-state multiplier. Used to multiply the number of wait states defined in the SWWSR by a factor
of 1 or 2.
0
SWSM
0
-
-
SWSM = 0: wait-state base values are unchanged (multiplied by 1).
SWSM = 1: wait-state base values are multiplied by 2 for a maximum of 14 wait states.
November 2001 – Revised July 2003
SPRS007B
19