TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A
TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A
DSP CONTROLLERS
SPRS145J − JULY 2000 − REVISED NOVEMBER 2004
pin functions (continued)
Table 2. LF240xA and LC240xA Pin List and Package Options
†‡
(Continued)
2403A,
LC2402A
(64-PAG)
and
2402A
(64-PG)
37
PLL loop filter input 2
Flash programming voltage pin. This pin must be connected to
a 5-V supply for Flash programming. The Flash cannot be
programmed if this pin is connected to GND. When not
programming the Flash (i.e., during normal device operation),
this pin can either be left connected to the 5-V supply or it can
be tied to GND. This pin must not be left floating at any time. Do
not use any current-limiting resistor in series with the 5-V supply
on this pin. This pin is a “no connect” (NC) on ROM parts (i.e.,
this pin is not connected to any circuitry internal to the device).
Connecting this pin to 5 V or leaving it open makes no difference
on ROM parts.
Test pin 1.
Do not connect.
Test pin 2.
Do not connect.
Branch control input. BIO is polled by the
BCND pma,BIO
instruction. If BIO is low, a branch is executed. If BIO is not used,
it should be pulled high. This pin is configured as a branch
control input by all device resets. It can be used as a GPIO, if
not used as a branch control input. (↑)
PIN NAME
LF2407A
(144-PGE)
2406A
(100-PZ)
LC2404A
(100-PZ)
DESCRIPTION
OSCILLATOR, PLL, FLASH, BOOT, AND MISCELLANEOUS (CONTINUED)
PLLF2
10
8
8
VCCP (5V)
58
40
40
60
TP1
TP2
60
63
42
44
42
44
61
62
BIO/IOPC1
119
85
85
EMULATION AND TEST
EMU0
90
61
61
7
Emulator I/O #0 with internal pullup. When TRST is driven high,
this pin is used as an interrupt to or from the emulator system
and is defined as input/output through the JTAG scan. (↑)
Emulator pin 1. Emulator pin 1 disables all outputs. When TRST
is driven high, EMU1/OFF is used as an interrupt to or from the
emulator system and is defined as an input/output through the
JTAG scan. When TRST is driven low, this pin is configured as
OFF. EMU1/OFF, when active low, puts all output drivers in the
high-impedance state. Note that OFF is used exclusively for
testing and emulation purposes (not for multiprocessing
applications). Therefore, for the OFF condition, the following
apply:
TRST = 0
EMU0 = 1
EMU1/OFF = 0 (↑)
JTAG test clock with internal pullup
(↑)
EMU1/OFF
91
62
62
8
TCK
135
94
94
29
†
Bold, italicized pin names
indicate pin function after reset.
‡ GPIO − General-purpose input/output pin. All GPIOs come up as input after reset.
§ It is highly recommended that VCCA be isolated from the digital supply voltage (and VSSA from digital ground) to maintain the specified accuracy
and improve the noise immunity of the ADC.
¶ Only when all of the following conditions are met: EMU1/OFF is low, TRST is low, and EMU0 is high
# No power supply pin (VDD, VDDO, VSS, or VSSO) should be left unconnected. All power supply pins must be connected appropriately for proper
device operation.
LEGEND:
↑
− Internal pullup
↓
− Internal pulldown
(Typical active pullup/pulldown value is
±16 µA.)
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