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TMS320LF2407APGEA 参数 Datasheet PDF下载

TMS320LF2407APGEA图片预览
型号: TMS320LF2407APGEA
PDF下载: 下载PDF文件 查看货源
内容描述: DSP控制器 [DSP CONTROLLERS]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器装置PC时钟
文件页数/大小: 133 页 / 1659 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A
TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A
DSP CONTROLLERS
SPRS145J − JULY 2000 − REVISED NOVEMBER 2004
pin functions
The TMS320LF2407A device is the superset of all the 240xA devices. All signals are available on the 2407A
device. Table 2 lists the signals available in the 240xA generation of devices.
Table 2. LF240xA and LC240xA Pin List and Package Options
†‡
2403A,
LC2402A
(64-PAG)
and
2402A
(64-PG)
PIN NAME
LF2407A
(144-PGE)
2406A
(100-PZ)
LC2404A
(100-PZ)
DESCRIPTION
EVENT MANAGER A (EVA)
CAP1/QEP1/IOPA3
CAP2/QEP2/IOPA4
CAP3/IOPA5
PWM1/IOPA6
PWM2/IOPA7
PWM3/IOPB0
PWM4/IOPB1
PWM5/IOPB2
PWM6/IOPB3
T1PWM/T1CMP/IOPB4
T2PWM/T2CMP/IOPB5
TDIRA/IOPB6
83
79
75
56
54
52
47
44
40
16
18
14
57
55
52
39
37
36
33
31
28
12
13
11
57
55
52
39
37
36
33
31
28
12
13
11
4
3
2
59
58
57
54
53
50
40
41
Capture input #1/quadrature encoder pulse input #1 (EVA) or
GPIO (↑)
Capture input #2/quadrature encoder pulse input #2 (EVA) or
GPIO (↑)
Capture input #3 (EVA) or GPIO (↑)
Compare/PWM output pin #1 (EVA) or GPIO (↑)
Compare/PWM output pin #2 (EVA) or GPIO (↑)
Compare/PWM output pin #3 (EVA) or GPIO (↑)
Compare/PWM output pin #4 (EVA) or GPIO (↑)
Compare/PWM output pin #5 (EVA) or GPIO (↑)
Compare/PWM output pin #6 (EVA) or GPIO (↑)
Timer 1 compare output (EVA) or GPIO (↑)
Timer 2 compare output (EVA) or GPIO (↑)
Counting direction for general-purpose (GP) timer (EVA) or
GPIO. If TDIRA = 1, upward counting is selected. If
TDIRA = 0, downward counting is selected. (↑)
49
External clock input for GP timer (EVA) or GPIO. Note that
the timer can also use the internal device clock. (↑)
TCLKINA/IOPB7
37
26
26
EVENT MANAGER B (EVB)
CAP4/QEP3/IOPE7
CAP5/QEP4/IOPF0
CAP6/IOPF1
PWM7/IOPE1
PWM8/IOPE2
PWM9/IOPE3
PWM10/IOPE4
PWM11/IOPE5
88
81
69
65
62
59
55
46
60
56
48
45
43
41
38
32
60
56
48
45
43
41
38
32
Capture input #4/quadrature encoder pulse input #3 (EVB) or
GPIO (↑)
Capture input #5/quadrature encoder pulse input #4 (EVB) or
GPIO (↑)
Capture input #6 (EVB) or GPIO (↑)
Compare/PWM output pin #7 (EVB) or GPIO (↑)
Compare/PWM output pin #8 (EVB) or GPIO (↑)
Compare/PWM output pin #9 (EVB) or GPIO (↑)
Compare/PWM output pin #10 (EVB) or GPIO (↑)
Compare/PWM output pin #11 (EVB) or GPIO (↑)
PWM12/IOPE6
38
27
27
Compare/PWM output pin #12 (EVB) or GPIO (↑)
Bold, italicized pin names
indicate pin function after reset.
‡ GPIO − General-purpose input/output pin. All GPIOs come up as input after reset.
§ It is highly recommended that VCCA be isolated from the digital supply voltage (and VSSA from digital ground) to maintain the specified accuracy
and improve the noise immunity of the ADC.
¶ Only when all of the following conditions are met: EMU1/OFF is low, TRST is low, and EMU0 is high
# No power supply pin (VDD, VDDO, VSS, or VSSO) should be left unconnected. All power supply pins must be connected appropriately for proper
device operation.
LEGEND:
− Internal pullup
− Internal pulldown
(Typical active pullup/pulldown value is
±16 µA.)
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
11