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TMS320F28232PTPQ 参数 Datasheet PDF下载

TMS320F28232PTPQ图片预览
型号: TMS320F28232PTPQ
PDF下载: 下载PDF文件 查看货源
内容描述: 数字信号控制器(DSC ) [Digital Signal Controllers (DSCs)]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器装置时钟
文件页数/大小: 199 页 / 2655 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320F28335, TMS320F28334, TMS320F28332  
TMS320F28235, TMS320F28234, TMS320F28232  
SPRS439M JUNE 2007REVISED AUGUST 2012  
www.ti.com  
6-5  
Clocking and Nomenclature (100-MHz Devices) ........................................................................... 125  
6-6  
Input Clock Frequency ......................................................................................................... 126  
XCLKIN Timing Requirements – PLL Enabled ............................................................................. 126  
XCLKIN Timing Requirements – PLL Disabled ............................................................................ 126  
XCLKOUT Switching Characteristics (PLL Bypassed or Enabled) ...................................................... 126  
Power Management and Supervisory Circuit Solutions ................................................................... 128  
Reset (XRS) Timing Requirements .......................................................................................... 130  
General-Purpose Output Switching Characteristics........................................................................ 131  
General-Purpose Input Timing Requirements .............................................................................. 132  
IDLE Mode Timing Requirements ........................................................................................... 134  
IDLE Mode Switching Characteristics ....................................................................................... 134  
STANDBY Mode Timing Requirements ..................................................................................... 135  
STANDBY Mode Switching Characteristics ................................................................................ 135  
HALT Mode Timing Requirements ........................................................................................... 137  
HALT Mode Switching Characteristics ...................................................................................... 137  
ePWM Timing Requirements ................................................................................................. 139  
ePWM Switching Characteristics ............................................................................................ 139  
Trip-Zone Input Timing Requirements ...................................................................................... 139  
High-Resolution PWM Characteristics at SYSCLKOUT = (60–150 MHz) .............................................. 140  
Enhanced Capture (eCAP) Timing Requirement .......................................................................... 140  
eCAP Switching Characteristics ............................................................................................. 140  
Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements .................................................. 141  
eQEP Switching Characteristics ............................................................................................. 141  
External ADC Start-of-Conversion Switching Characteristics............................................................. 142  
External Interrupt Timing Requirements .................................................................................... 142  
External Interrupt Switching Characteristics ................................................................................ 142  
I2C Timing ...................................................................................................................... 143  
SPI Master Mode External Timing (Clock Phase = 0) .................................................................... 144  
SPI Master Mode External Timing (Clock Phase = 1) .................................................................... 146  
SPI Slave Mode External Timing (Clock Phase = 0) ...................................................................... 148  
SPI Slave Mode External Timing (Clock Phase = 1) ...................................................................... 150  
Relationship Between Parameters Configured in XTIMING and Duration of Pulse ................................... 151  
XINTF Clock Configurations .................................................................................................. 154  
External Interface Read Timing Requirements ............................................................................. 156  
External Interface Read Switching Characteristics......................................................................... 156  
External Interface Write Switching Characteristics ......................................................................... 158  
External Interface Read Switching Characteristics (Ready-on-Read, 1 Wait State)................................... 160  
External Interface Read Timing Requirements (Ready-on-Read, 1 Wait State) ....................................... 160  
Synchronous XREADY Timing Requirements (Ready-on-Read, 1 Wait State) ....................................... 160  
Asynchronous XREADY Timing Requirements (Ready-on-Read, 1 Wait State)....................................... 160  
External Interface Write Switching Characteristics (Ready-on-Write, 1 Wait State) ................................... 163  
Synchronous XREADY Timing Requirements (Ready-on-Write, 1 Wait State) ....................................... 163  
Asynchronous XREADY Timing Requirements (Ready-on-Write, 1 Wait State) ...................................... 163  
XHOLD/XHOLDA Timing Requirements (XCLKOUT = XTIMCLK) ...................................................... 167  
XHOLD/XHOLDA Timing Requirements (XCLKOUT = 1/2 XTIMCLK) ................................................. 168  
ADC Electrical Characteristics (over recommended operating conditions) ............................................ 169  
ADC Power-Up Delays......................................................................................................... 170  
Typical Current Consumption for Different ADC Configurations (at 25-MHz ADCCLK) .............................. 170  
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8
List of Tables  
Copyright © 2007–2012, Texas Instruments Incorporated  
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