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TMS320F28232PTPQ 参数 Datasheet PDF下载

TMS320F28232PTPQ图片预览
型号: TMS320F28232PTPQ
PDF下载: 下载PDF文件 查看货源
内容描述: 数字信号控制器(DSC ) [Digital Signal Controllers (DSCs)]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器装置时钟
文件页数/大小: 199 页 / 2655 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320F28335, TMS320F28334, TMS320F28332  
TMS320F28235, TMS320F28234, TMS320F28232  
www.ti.com  
SPRS439M JUNE 2007REVISED AUGUST 2012  
3.7 Low-Power Modes Block  
The low-power modes on the 2833x/2823x devices are similar to the 240x devices. Table 3-20  
summarizes the various modes.  
Table 3-20. Low-Power Modes  
MODE  
LPMCR0(1:0)  
OSCCLK  
CLKIN  
SYSCLKOUT  
EXIT(1)  
XRS, Watchdog interrupt, any enabled  
interrupt, XNMI  
IDLE  
00  
On  
On  
On(2)  
On  
XRS, Watchdog interrupt, GPIO Port A  
signal, debugger(3), XNMI  
STANDBY  
HALT  
01  
1X  
Off  
Off  
Off  
Off  
(watchdog still running)  
Off  
XRS, GPIO Port A signal, XNMI,  
debugger(3)  
(oscillator and PLL turned off,  
watchdog not functional)  
(1) The Exit column lists which signals or under what conditions the low power mode will be exited. A low signal, on any of the signals, will  
exit the low power condition. This signal must be kept low long enough for an interrupt to be recognized by the device. Otherwise, the  
IDLE mode will not be exited and the device will go back into the indicated low power mode.  
(2) The IDLE mode on the C28x behaves differently than on the 24x/240x. On the C28x, the clock output from the CPU (SYSCLKOUT) is  
still functional while on the 24x/240x the clock is turned off.  
(3) On the C28x, the JTAG port can still function even if the CPU clock (CLKIN) is turned off.  
The various low-power modes operate as follows:  
IDLE Mode:  
This mode is exited by any enabled interrupt or an XNMI that is recognized  
by the processor. The LPM block performs no tasks during this mode as  
long as the LPMCR0(LPM) bits are set to 0,0.  
STANDBY Mode:  
Any GPIO port A signal (GPIO[31:0]) can wake the device from STANDBY  
mode. The user must select which signal(s) will wake the device in the  
GPIOLPMSEL register. The selected signal(s) are also qualified by the  
OSCCLK before waking the device. The number of OSCCLKs is specified in  
the LPMCR0 register.  
HALT Mode:  
Only the XRS and any GPIO port A signal (GPIO[31:0]) can wake the  
device from HALT mode. The user selects the signal in the GPIOLPMSEL  
register.  
NOTE  
The low-power modes do not affect the state of the output pins (PWM pins included). They  
will be in whatever state the code left them in when the IDLE instruction was executed. See  
the TMS320x2833x, 2823x System Control and Interrupts Reference Guide (literature  
number SPRUFB0) for more details.  
Copyright © 2007–2012, Texas Instruments Incorporated  
Functional Overview  
63  
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Product Folder Link(s): TMS320F28335 TMS320F28334 TMS320F28332 TMS320F28235 TMS320F28234  
TMS320F28232