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TMS320F28232 参数 Datasheet PDF下载

TMS320F28232图片预览
型号: TMS320F28232
PDF下载: 下载PDF文件 查看货源
内容描述: 数字信号控制器(DSC ) [Digital Signal Controllers (DSCs)]
分类和应用: 控制器
文件页数/大小: 170 页 / 2247 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320F28335, TMS320F28334, TMS320F28332  
TMS320F28235, TMS320F28234, TMS320F28232  
Digital Signal Controllers (DSCs)  
www.ti.com  
SPRS439CJUNE 2007REVISED FEBRUARY 2008  
6.4.1 Reducing Current Consumption  
Like 280x and 281x, the F2833x/F2823x DSCs incorporate a unique method to reduce the device current  
consumption. Since each peripheral unit has an individual clock-enable bit, significant reduction in current  
consumption can be achieved by turning off the clock to any peripheral module that is not used in a given  
application. Furthermore, any one of the three low-power modes could be taken advantage of to reduce  
the current consumption even further. Table 6-3 indicates the typical reduction in current consumption  
achieved by turning off the clocks.  
Table 6-3. Typical Current Consumption by Various  
Peripherals (at 150 MHz)(1)  
PERIPHERAL  
MODULE  
IDD CURRENT  
REDUCTION (mA)  
ADC  
I2C  
8(2)  
2.5  
5
eQEP  
ePWM  
eCAP  
SCI  
5
2
5
SPI  
4
eCAN  
McBSP  
CPU - Timer  
XINTF  
DMA  
8
7
2
10(3)  
10  
15  
FPU  
(1) All peripheral clocks are disabled upon reset. Writing to/reading  
from peripheral registers is possible only after the peripheral clocks  
are turned on.  
(2) This number represents the current drawn by the digital portion of  
the ADC module. Turning off the clock to the ADC module results in  
the elimination of the current drawn by the analog portion of the  
ADC (IDDA18) as well.  
(3) Operating the XINTF bus has a significant effect on IDDIO current.  
It will increase considerably based on the following:  
How many address/data pins toggle from one cycle to another  
How fast they toggle  
Whether 16-bit or 32-bit interface is used and  
The load on these pins.  
Other methods to reduce power consumption further are as follow:  
The Flash module may be powered down if code is run off SARAM. This results in a current reduction  
of 35 mA (typical) in the VDD3VFL rail.  
IDDIO current consumption is reduced by 15 mA (typical) when XCLKOUT is turned off.  
The baseline IDD current (current when the core is executing a dummy loop with no peripherals enabled) is  
165 mA, (typical). To arrive at the IDD current for a given application, the current-drawn by the peripherals  
(enabled by that application) must be added to the baseline IDD current.  
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Electrical Specifications  
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