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TMS320F2812ZHHAR 参数 Datasheet PDF下载

TMS320F2812ZHHAR图片预览
型号: TMS320F2812ZHHAR
PDF下载: 下载PDF文件 查看货源
内容描述: [C2000™ 32-bit MCU with 150 MHz, 256 KB Flash, EMIF 179-BGA MICROSTAR -40 to 85]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器装置可编程只读存储器时钟
文件页数/大小: 170 页 / 1662 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SPRS174S – APRIL 2001 – REVISED MARCH 2011
shows how the various register bits select the various modes of operation for GPIO function.
GPxDAT/SET/CLEAR/TOGGLE
Register Bit(s)
Digital I/O
Peripheral I/O
GPxQUAL
Register
GPxMUX
Register Bit
GPxDIR
Register Bit
High-
Impedance
Control
0
MUX
1
0
MUX
1
Input Qualification
SYSCLKOUT
High-Impedance
Enable (1)
XRS
Internal (Pullup or Pulldown)
PIN
A.
B.
In the GPIO mode, when the GPIO pin is configured for output operation, reading the GPxDAT data register only
gives the value written, not the value at the pin. In the peripheral mode, the state of the pin can be read through the
GPxDAT register, provided the corresponding direction bit is zero (input mode).
Some selected input signals are qualified by the SYSCLKOUT. The GPxQUAL register specifies the qualification
sampling period. The sampling window is 6 samples wide and the output is only changed when all samples are the
same (all 0's or all 1's). This feature removes unwanted spikes from the input signal.
Figure 4-12. GPIO/Peripheral Pin Multiplexing
NOTE
The input function of the GPIO pin and the input path to the peripheral are always enabled. It
is the output function of the GPIO pin that is multiplexed with the output path of the primary
(peripheral) function. Since the output buffer of a pin connects back to the input buffer, any
GPIO signal present at the pin will be propagated to the peripheral module as well.
Therefore, when a pin is configured for GPIO operation, the corresponding peripheral
functionality (and interrupt-generating capability) must be disabled. Otherwise, interrupts may
be inadvertently triggered. This is especially critical when the PDPINTA and PDPINTB pins
are used as GPIO pins, since a value of zero for GPDDAT.0 or GPDDAT.5 (PDPINTx) will
put PWM pins in a high-impedance state. The CxTRIP and TxCTRIP pins will also put the
corresponding PWM pins in high impedance, if they are driven low (as GPIO pins)
and
bit
EXTCONx.0 = 1.
Copyright © 2001–2011, Texas Instruments Incorporated
Peripherals
85
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