SPRS174S – APRIL 2001 – REVISED MARCH 2011
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3.8
OSC and PLL Block
shows the OSC and PLL block on the F281x and C281x.
XF_XPLLDIS
Latch
XRS
XPLLDIS
XCLKIN
X1/XCLKIN
OSCCLK (PLL Disabled)
0
CLKIN
CPU
SYSCLKOUT
On-Chip
Oscillator
(OSC)
PLL
Bypass
4-Bit PLL Select
/2
1
X2
PLL
4-Bit PLL Select
PLL Block
Figure 3-9. OSC and PLL Block
The on-chip oscillator circuit enables a crystal to be attached to the F281x and C281x devices using the
X1/XCLKIN and X2 pins. If a crystal is not used, then an external oscillator can be directly connected to
the X1/XCLKIN pin and the X2 pin is left unconnected. The logic-high level in this case should not
exceed V
DD
. The PLLCR bits [3:0] set the clocking ratio.
50
Functional Overview
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