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TMS320F2812PGFS 参数 Datasheet PDF下载

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型号: TMS320F2812PGFS
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内容描述: 数字信号处理器 [Digital Signal Processors]
分类和应用: 数字信号处理器
文件页数/大小: 170 页 / 1662 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SPRS174S – APRIL 2001 – REVISED MARCH 2011
The operation and timing of the external interface, can be controlled by the registers listed in
Table 3-10. XINTF Configuration and Control Register Mappings
NAME
XTIMING0
XTIMING1
XTIMING2
XTIMING6
XTIMING7
XINTCNF2
XBANK
XREVISION
ADDRESS
0x00 0B20
0x00 0B22
0x00 0B24
0x00 0B2C
0x00 0B2E
0x00 0B34
0x00 0B38
0x00 0B3A
SIZE
(x16)
2
2
2
2
2
2
1
1
DESCRIPTION
XINTF Timing Register, Zone 0 can access as two 16-bit registers or one 32-bit register.
XINTF Timing Register, Zone 1 can access as two 16-bit registers or one 32-bit register.
XINTF Timing Register, Zone 2 can access as two 16-bit registers or one 32-bit register.
XINTF Timing Register, Zone 6 can access as two 16-bit registers or one 32-bit register.
XINTF Timing Register, Zone 7 can access as two 16-bit registers or one 32-bit register.
XINTF Configuration Register can access as two 16-bit registers or one 32-bit register.
XINTF Bank Control Register
XINTF Revision Register
3.5.1
Timing Registers
XINTF signal timing can be tuned to match specific external device requirements such as setup and hold
times to strobe signals for contention avoidance and maximizing bus efficiency. The XINTF timing
parameters can be configured individually for each zone based on the requirements of the memory or
peripheral accessed by that particular zone. This allows the programmer to maximize the efficiency of the
bus on a per-zone basis. All XINTF timing values are with respect to XTIMCLK, which is equal to or
one-half of the SYSCLKOUT rate, as shown in
For detailed information on the XINTF timing and configuration register bit fields, see the
TMS320x281x
DSP External Interface (XINTF) Reference Guide
(literature number
3.5.2
XREVISION Register
The XREVISION register contains a unique number to identify the particular version of XINTF used in the
product. For the 2812, this register will be configured as described in
Table 3-11. XREVISION Register Bit Definitions
BIT(S)
15–0
NAME
REVISION
TYPE
R
RESET
0x0004
DESCRIPTION
Current XINTF Revision. For internal use/reference. Test purposes
only. Subject to change.
Copyright © 2001–2011, Texas Instruments Incorporated
Functional Overview
43
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