TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, UCD9501
TMS320C2802, TMS320C2801, and TMS320F2801x DSPs
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SPRS230H–OCTOBER 2003–REVISED JUNE 2006
Block Start
Address
Prog Space
Data Space
0x00 0000
M0 SARAM (1K y 16)
0x00 0400
0x00 0800
0x00 0D00
M1 SARAM (1K y 16)
Peripheral Frame 0
PIE Vector − RAM
(256 x 16)
(Enabled if ENPIE = 1)
0x00 0E00
0x00 6000
Peripheral Frame 1
(protected)
0x00 7000
0x00 8000
Peripheral Frame 2
(protected)
L0 SARAM (0-wait)
(4k y 16, Secure Zone, Dual Mapped)
0x00 9000
0x00 A000
L1 SARAM (0-wait)
(4k y 16, Secure Zone, Dual Mapped)
0x3D 7800
0x3D 7C00
OTP
(1 K y 16, Secure Zone)
0x3F 0000
FLASH
(32 K y 16, Secure Zone)
0x3F 7FF8
0x3F 8000
128-bit Password
L0 SARAM (0-wait) (4k y 16,
Secure Zone, Dual Mapped)
0x3F 9000
0x3F A000
L1 SARAM (0-wait) (4k y 16,
Secure Zone, Dual Mapped)
0x3F F000
0x3F FFC0
Boot ROM (4 K y 16)
Vectors (32 y 32)
(enabled if VMAP = 1, ENPIE = 0)
Reserved
A. Memory blocks are not to scale.
B. Peripheral Frame 0, Peripheral Frame 1, and Peripheral Frame 2 memory maps are restricted to data memory only.
User program cannot access these memory maps in program space.
C. Protected means the order of Write followed by Read operations is preserved rather than the pipeline order.
D. Certain memory ranges are EALLOW protected against spurious writes after configuration.
Figure 3-4. F2806 Memory Map
28
Functional Overview
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