I
2
C TIMING DIAGRAMS
t
(LOW)
t
R
t
F
t
(HDSTA)
SCL
t
(HDSTA)
t
(HDDAT)
SDA
t
(BUF)
P
S
S
P
t
(HIGH)
t
(SUSTA)
t
(SUDAT)
t
(SUSTO)
FIGURE 4. Two-Wire Timing Diagram.
1
SCL
9
1
9
…
SDA
Start By
Master
1
0
0
1
A2
A1
A0
R/W
ACK By
TMP75
0
0
0
0
0
0
P1
P0
ACK By
TMP75
…
Frame 1 Two-Wire Slave Address Byte
1
SCL
(Continued)
9
1
Frame 2 Pointer Register Byte
9
SDA
(Continued)
D7
D6
D5
D4
D3
D2
D1
D0
ACK By
TMP75
D7
D6
D5
D4
D3
D2
D1
D0
ACK By
TMP75
Stop By
Master
Frame 3 Data Byte 1
Frame 4 Data Byte 2
FIGURE 5. Two-Wire Timing Diagram for TMP75 Write Word Format.
1
SCL
9
1
9
…
SDA
A7
Start By
Master
A6
A5
A4
A3
A2
A1
A0
R/W
ACK By
TMP175
0
0
0
0
0
0
P1
P0
ACK By
TMP175
…
Frame 1 Two-Wire Slave Address Byte
1
SCL
(Continued)
9
1
Frame 2 Pointer Register Byte
9
SDA
(Continued)
D7
D6
D5
D4
D3
D2
D1
D0
ACK By
TMP175
D7
D6
D5
D4
D3
D2
D1
D0
ACK By
TMP175
Stop By
Master
Frame 3 Data Byte 1
Frame 4 Data Byte 2
FIGURE 6. Two-Wire Timing Diagram for TMP175 Write Word Format.
10
TMP175, 75
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SBOS288C