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TLC5970RHPR 参数 Datasheet PDF下载

TLC5970RHPR图片预览
型号: TLC5970RHPR
PDF下载: 下载PDF文件 查看货源
内容描述: 3通道, 12位, PWM LED驱动器,降压型DC / DC转换器和差分信号接口 [3-Channel, 12-Bit, PWM LED Driver with Buck DC/DC Converter and Differential Signal Interface]
分类和应用: 显示驱动器转换器驱动程序和接口接口集成电路
文件页数/大小: 48 页 / 635 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TLC5970  
www.ti.com  
SBVS140 MARCH 2010  
THERMAL INFORMATION  
TLC5970  
RHP  
28  
THERMAL METRIC(1)  
UNITS  
qJA  
Junction-to-ambient thermal resistance(2)  
Junction-to-case(top) thermal resistance  
26.7  
11.7  
5.3  
(3)  
qJC(top)  
qJB  
(4)  
Junction-to-board thermal resistance  
°C/W  
(5)  
yJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
0.4  
(6)  
(7)  
yJB  
5.2  
qJC(bottom)  
Junction-to-case(bottom) thermal resistance  
1.6  
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.  
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as  
specified in JESD51-7, in an environment described in JESD51-2a.  
(3) The junction-to-case(top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard  
test exists, but a close description can be found in the ANSI SEMI standard G30-88.  
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB  
temperature, as described in JESD51-8.  
(5) The junction-to-top characterization parameter, yJT, estimates the junction temperature of a device in a real system and is extracted  
from the simulation data for obtaining qJA, using a procedure described in JESD51-2a (sections 6 and 7).  
(6) The junction-to-board characterization parameter, yJB estimates the junction temperature of a device in a real system and is extracted  
from the simulation data for obtaining qJA , using a procedure described in JESD51-2a (sections 6 and 7).  
(7) The junction-to-case(bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific  
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.  
DISSIPATION RATINGS  
DERATING FACTOR  
ABOVE TA = +25°C  
POWER RATING  
TA < +25°C  
POWER RATING  
TA = +70°C  
POWER RATING  
TA = +85°C  
PACKAGE  
HTSSOP-32  
42.5 mW/°C  
22.5 mW/°C  
33.2 mW/°C  
5318 mW  
2820 mW  
4149 mW  
3403 mW  
1805 mW  
2655 mW  
2765 mW  
1466 mW  
2157 mW  
with PowerPAD soldered(1)(2)  
HTSSOP-32  
with PowerPAD unsoldered(2)(3)  
QFN-28  
bottom side heat sink soldered(4)  
(1) With PowerPAD soldered onto copper area on printed circuit board (PCB); 2-oz. copper. For more information, see application report  
SLMA002, PowerPAD Thermally-Enhanced Package (available for download at www.ti.com).  
(2) Product preview device.  
(3) With PowerPAD not soldered onto copper area on PCB.  
(4) The package thermal impedance is calculated in accordance with JESD51-5.  
Copyright © 2010, Texas Instruments Incorporated  
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Product Folder Link(s): TLC5970  
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