TLC5620C, TLC5620I
QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS081E – NOVEMBER 1994 – REVISED NOVEMBER 2001
equivalent inputs and outputs
INPUT CIRCUIT
OUTPUT CIRCUIT
V
DD
V
DD
_
+
Input from
Decoded DAC
Register String
DAC
Voltage Output
V
Input
ref
× 1
84 kΩ
Output
Range
Select
To DAC
Resistor
String
I
× 2
SINK
60 µA
Typical
84 kΩ
GND
GND
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (V
– GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
DD
Digital input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND – 0.3 V to V
Reference input voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND – 0.3 V to V
Operating free-air temperature range, T : TLC5620C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
+ 0.3 V
+ 0.3 V
DD
DD
ID
A
TLC5620I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN
NOM
MAX
UNIT
V
Supply voltage, V
DD
4.75
5.25
High-level input voltage, V
IH
0.8 V
V
DD
Low-level input voltage, V
0.8
V
IL
Reference voltage, V [A|B|C|D]
V
–1.5
V
ref
Analog full-scale output voltage, R = 10 kΩ
DD
3.5
V
L
Load resistance, R
10
50
kΩ
ns
L
Setup time, data input, t
(see Figures 1 and 2)
su(DATA-CLK)
Valid time, data input valid after CLK↓, t
(see Figures 1 and 2)
50
50
ns
ns
ns
ns
ns
ns
v(DATA-CLK)
Setup time, CLK eleventh falling edge to LOAD, t
(see Figure 1)
su(CLK-LOAD)
(see Figure 1)
Setup time, LOAD↑ to CLK↓, t
50
su(LOAD-CLK)
Pulse duration, LOAD, t
Pulse duration, LDAC, t
(see Figure 1)
(see Figure 2)
250
250
0
w(LOAD)
w(LDAC)
Setup time, LOAD↑ to LDAC↓, t
(see Figure 2)
su(LOAD-LDAC)
CLK frequency
1
70
85
MHz
°C
TLC5620C
TLC5620I
0
Operating free-air temperature, T
A
–40
°C
6
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