TL16C752B
3.3-V DUAL UART WITH 64-BYTE FIFO
SLLS405A – DECEMBER 1999 – REVISED AUGUST 2000
PRINCIPLES OF OPERATION
FIFO ready register (continued)
Table 20. FIFO Ready Register
BIT NO.
BIT SETTINGS
0
0 = There are less than a TX trigger level number of spaces available in the TX FIFO of channel A.
1 = There are at least a TX trigger level number of spaces available in the TX FIFO of channel A.
1
0 = There are less than a TX trigger level number of spaces available in the TX FIFO of channel B.
1 = There are at least a TX trigger level number of spaces available in the TX FIFO of channel B.
3:2
4
Unused, always 0
0 = There are less than a RX trigger level number of characters in the RX FIFO of channel A.
1 = The RX FIFO of channel A has more than a RX trigger level number of characters available for reading or a timeout condition
has occurred.
5
0 = There are less than a RX trigger level number of characters in the RX FIFO of channel B.
1 = The RX FIFO of channel B has more than a RX trigger level number of characters available for reading or a timeout condition
has occurred.
7:6
Unused, always 0
The FIFORdy register is a read-only register that can be accessed when any of the two UARTs are selected
CSA-B = 0, MCR[2] (FIFO Rdy Enable) is a logic 1 and loopback is disabled. The address is 111.
TL16C752 programmer’s guide
The base set of registers that is used during high speed data transfer have a straightforward access method.
The extended function registers require special access bits to be decoded along with the address lines. The
following guide will help with programming these registers. Note that the descriptions below are for individual
register access. Some streamlining through interleaving can be obtained when programming all the registers.
Set baud rate to VALUE1, VALUE2
Set Xoff1, Xon1 to VALUE1, VALUE2
Set Xoff2, Xon2 to VALUE1, VALUE2
Set software flow control mode to VALUE
Read LCR (03), save in temp
Set LCR (03) to 80
Set DLL (00) to VALUE1
Set DLM (01) to VALUE2
Set LCR (03) to temp
Read LCR (03), save in temp
Set LCR (03) to BF
Set Xoff1 (06) to VALUE1
Set Xon1 (04) to VALUE2
Set LCR (03) to temp
Read LCR (03), save in temp
Set LCR (03) to BF
Set Xoff2 (07) to VALUE1
Set Xon2 (05) to VALUE2
Set LCR (03) to temp
Read LCR (03), save in temp
Set LCR (03) to BF
Set EFR (02) to VALUE
Set LCR (03) to temp
32
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