TL16C550C, TL16C550CI
ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH AUTOFLOW CONTROL
SLLS177E – MARCH 1994 – REVISED APRIL1998
system timing requirements over recommended ranges of supply voltage and operating free-air
temperature
ALT. SYMBOL FIGURE TEST CONDITIONS
MIN
87
MAX
UNIT
ns
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Cycle time, read (t
+ t + t
)
RC
cR
cW
w1
w2
w5
w6
w7
w8
su1
su2
su3
su4
h1
w7 d8 d9
Cycle time, write (t
+ t + t
w6 d5 d6
)
WC
87
ns
Pulse duration, clock high
Pulse duration, clock low
Pulse duration, ADS low
Pulse duration, WR
t
XH
f = 16 MHz Max,
CC
5
25
ns
V
= 5 V
t
XL
t
6, 7
6
9
40
40
1
ns
ns
ns
µs
ADS
t
WR
Pulse duration, RD
t
7
RD
MR
Pulse duration, MR
t
Setup time, address valid before ADS↑
Setup time, CS valid before ADS↑
t
AS
CS
DS
6, 7
8
ns
t
Setup time, data valid before WR1↓ or WR2↑
Setup time, CTS↑ before midpoint of stop bit
Hold time, address low after ADS↑
t
t
6
15
ns
ns
17
10
AH
CH
6, 7
6
0
ns
ns
Hold time, CS valid after ADS↑
t
h2
Hold time, CS valid after WR1↑ or WR2↓
Hold time, address valid after WR1↑ or WR2↓
Hold time, data valid after WR1↑ or WR2↓
Hold time, chip select valid after RD1↑ or RD2↓
Hold time, address valid after RD1↑ or RD2↓
Delay time, CS valid before WR1↓ or WR2↑
Delay time, address valid before WR1↓ or WR2↑
Delay time, write cycle, WR1↑ or WR2↓ to ADS↓
Delay time, CS valid to RD1↓ or RD2↑
Delay time, address valid to RD1↓ or RD2↑
Delay time, read cycle, RD1↑ or RD2↓ to ADS↓
Delay time, RD1↓ or RD2↑ to data valid
Delay time, RD1↑ or RD2↓ to floating data
t
WCS
h3
10
t
h4
WA
t
6
7
7
5
10
20
ns
ns
ns
h5
DH
t
h6
RCS
t
h7
RA
†
t
d4
CSW
6
6
7
7
40
7
ns
ns
ns
†
t
d5
AW
WC
†
t
d6
†
t
d7
CSR
†
t
d8
AR
tRC
7
7
7
40
45
20
ns
ns
ns
d9
t
C
C
= 75 pF
= 75 pF
d10
d11
RVD
L
L
t
HZ
†
Only applies when ADS is low
system switching characteristics over recommended ranges of supply voltage and operating
free-air temperature (see Note 7)
PARAMETER
ALT. SYMBOL
FIGURE TEST CONDITIONS
= 75 pF
MIN
MAX
UNIT
t
Disable time, RD1↓↑ or RD2↑↓ to DDIS↑↓
t
7
C
L
20
ns
dis(R)
RDD
, and external loading.
NOTE 7: Charge and discharge times are determined by V , V
OL OH
baud generator switching characteristics over recommended ranges of supply voltage and
operating free-air temperature, C = 75 pF
L
PARAMETER
ALT. SYMBOL
FIGURE
TEST CONDITIONS
MIN
MAX
UNIT
t
t
t
t
Pulse duration, BAUDOUT low
Pulse duration, BAUDOUT high
Delay time, XIN↑ to BAUDOUT↑
Delay time, XIN↑↓ to BAUDOUT↓
t
5
5
5
5
w3
w4
d1
d2
LW
f = 16 MHz, CLK ÷ 2,
CC
50
ns
V
= 5 V
t
HW
t
45
45
ns
ns
BLD
t
BHD
10
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