TAS5705
www.ti.com ...................................................................................................................................................................................................... SLOS549–JUNE 2008
OSCILLATOR TRIM REGISTER (0x1B)
The TAS5705 PWM processor contains an internal oscillator for PLL reference. This reduces system cost
because an external reference is not required. Currently, TI recommends a trim resistor value of 18.2 kΩ (1%).
This should be connected between OSC_RES and DVSS.
The factory-trim procedure simply enables the factory trim that was previously done at the factory.
Note that trim always must be run following reset of the device.
Oscillator Trim Enable Procedure Example
Write data 0x00 to register 0x1B (enable factory trim).
Table 22. Oscillator Trim Register (0x1B)
D7
1
D6
–
D5
–
D4
–
D3
–
D2
–
D1
–
D0
–
FUNCTION
(1)
Reserved
(1)
–
0
–
–
–
–
–
–
Oscillator trim not done (read-only)
–
1
–
–
–
–
–
–
Oscillator trim done (read-only)
(1)
–
–
0
0
0
0
–
–
Reserved
–
–
–
–
–
–
0
–
Select factory trim (Write a 0 to select factory trim; default is 1.)
(1)
–
–
–
–
–
–
1
–
Factory trim disabled
(1)
–
–
–
–
–
–
–
0
Reserved
(1) Default values are in bold.
BKND_ERR REGISTER (0x1C)
When a back-end error signal is received (BKND_ERR = LOW), all the output stages are reset by setting all
PWM and VALID signals LOW. Subsequently, the modulator waits approximately for the time listed in Table 23
before initiation of a reset.
Table 23. BKND_ERR Register (0x1C)
D7
–
–
–
–
–
–
–
–
–
–
–
–
–
D6
–
–
–
–
–
–
–
–
–
–
–
–
–
D5
–
–
–
–
–
–
–
–
–
–
–
–
–
D4
–
–
–
–
–
–
–
–
–
–
–
–
–
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
–
D0
0
1
0
1
0
1
0
1
0
1
0
1
–
FUNCTION
Set back-end reset period to 0 ms (Reserved)
Set back-end reset period to 150 ms (Reserved)
(1)
Set back-end reset period to 299 ms
Set back-end reset period to 449 ms
Set back-end reset period to 598 ms
Set back-end reset period to 748 ms
Set back-end reset period to 898 ms
Set back-end reset period to 1047 ms
Set back-end reset period to 1197 ms
Set back-end reset period to 1346 ms
Set back-end reset period to 1496 ms
Set back-end reset period to 1496 ms
Set back-end reset period to 1496 ms
(1) Default values are in bold.
Copyright © 2008, Texas Instruments Incorporated
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