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SLOS549 – JUNE 2008
RESET TIMING (RESET)
Control signal parameters over recommended operating conditions (unless otherwise noted)
PARAMETER
t
d(VALID_LOW)
t
w(RESET)
t
d(I2C_ready)
t
d(run)
Time to assert VALID (reset to power stage) low
Pulse duration, RESET active
Time to enable I C
Device start-up time (after start-up command via I C)
2
2
MIN
100
10
TYP
100
200
3.5
MAX
UNIT
ns
ns
ms
ms
RESET
Earliest time
that hard mute
could be exited
t
w(RESET)
VALID
t
d(I2C_ready)
t
d(VALID_LOW)
System initialization.
Enable via I C.
T0029-05
t
d(run)
Start system
2
NOTE: RESET must be asserted low at least 100
µs
after DVDD reaches 3.0 V.
Figure 5. Reset Timing
POWER-DOWN (PDN) TIMING
Control signal parameters over recommended operating conditions (unless otherwise noted)
PARAMETER
t
d(VALID_LOW)
t
d(STARTUP)
t
w
Time to assert VALID (reset to power stage) low
Device startup time
Minimum pulse duration required
1
MIN
TYP
725
650
MAX
UNIT
µs
µs
µs
PDN
t
w
VALID
t
d(VALID_LOW)
t
d(STARTUP)
T0030-04
Figure 6. Power-Down Timing
Copyright © 2008, Texas Instruments Incorporated
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